A composition of matter and method of forming copper indium gallium sulfide (CIGS), copper indium gallium selenide (CIGSe), or copper indium gallium telluride thin film via conversion of layer-by-layer (LbL) assembled CuInGa oxide (CIGO) nanoparticles and polyelectrolytes. CIGO nanoparticles are created via a flame-spray pyrolysis method using metal nitrate precursors, subsequently coated with polyallylamine (PAH), and dispersed in aqueous solution. Multilayer films are assembled by alternately dipping a substrate into a solution of either polydopamine (PDA) or polystyrenesulfonate (PSS) and then in the CIGO-PAH dispersion to fabricate films as thick as 1-2 microns. After LbL deposition, films are oxidized to remove polymer and sulfurized, selenized, or tellurinized to convert CIGO to CIGS, CIGSe, or copper indium gallium telluride.

An etching fault is suppressed by use of an etching gas containing iodine heptafluoride. Provided is an attached substance removing method of removing an attached substance containing an iodine oxide attached to a component included in a chamber or a surface of a pipe connected with the chamber by use of a cleaning gas containing a fluorine-containing gas. Also provided is a dry etching method, including the steps of supplying an etching gas containing an iodine-containing gas into a chamber to perform etching on a surface of a substrate; and after the etching is performed on the surface of the substrate, removing an attached substance containing an iodine oxide attached to a component included in the chamber or a surface of a pipe connected with the chamber by use of a cleaning gas containing a fluorine-containing gas.

Examples of the various techniques introduced here include, but not limited to, a mesa height adjustment approach during shallow trench isolation formation, a transistor via first approach, and a multiple absorption layer approach. As described further below, the techniques introduced herein include a variety of aspects that can individually and/or collectively resolve or mitigate one or more traditional limitations involved with manufacturing PDs and transistors on the same substrate, such as above discussed reliability, performance, and process temperature issues.

A device and a method of forming a device. The method comprises forming an oxide material film; forming two metal electrodes on the oxide material film, the two metal electrodes laterally spaced from each other such that an electric path between the two electrodes comprises at least a portion of the oxide material film; configuring the oxide material film such that a current-voltage characteristic of the device as measured via the two metal electrodes exhibits nonlinearity and rectification.

Disclosed are a solar cell module and a method of fabricating the same. The solar cell module includes a back electrode layer disposed on a support substrate and having a first separation pattern, a light absorbing layer disposed on the back electrode layer and having a second separation pattern, and a plurality of solar cells disposed on the light absorbing layer and formed with a front electrode layer including an insulator.

The present invention relates to a plasma texturing method for silicon based solar cells and the nanostructured silicon solar cells produced thereof. The silicon based solar cell comprises a silicon substrate having in at least part of its surface conical shaped nanostructures having an average height between 200 and 450 nm and a pitch between 100 and 200 nm, thereby achieving low reflectance and minimizing surface charge recombination.

A component intended for the detecting and/or the measuring of an electromagnetic radiation in a first range of wavelengths. The component includes a support including at least one first structure and a reception face in order to receive the electromagnetic radiation; an optical filter of the band-pass type in the first range of wavelengths arranged on the reception face of the support. The optical filter includes an adaptation zone covering the reception face of the support and with a refractive index less than 2; a first metal layer covering the adaptation zone and including regularly distributed through-holes. Each one of the through-holes contains a filling material.

An avalanche photodiode includes a GeOI substrate; an IGe absorption layer configured to absorb an optical signal and generate a photo-generated carrier; a first p-type SiGe layer, a second p-type SiGe layer, a first SiGe layer, and a second SiGe layer, where a Si content in any one of the SiGe layers is less than or equal to 20%; a first SiO.sub.2 oxidation layer and a second SiO.sub.2 oxidation layer; a first taper type silicon Si waveguide layer and a second taper type silicon Si waveguide layer; a heavily-doped n-type silicon Si multiplication layer; and anode electrodes and a cathode electrode.

A device including a gate structure formed over a semiconductor substrate, the gate structure having extensions, a device isolation structure formed into the semiconductor substrate adjacent the gate structure, wherein the extensions are over a portion of the device isolation structure, and source/drain regions on both sides of the gate structure, the source/drain regions being formed in a gap in the device isolation structure and being partially enclosed by the extensions of the gate structure.

After forming an absorber layer containing cracks over a back contact layer, a passivation layer is formed over a top surface of the absorber layer and interior surfaces of the cracks. The passivation layer is deposited in a manner such that that the cracks in the absorber layer are fully passivated by the passivation layer. An emitter layer is then formed over the passivation layer to pinch off upper portions of the cracks, leaving voids in lower portions of the cracks.