Fabricating an optics wafer includes providing a wafer comprising a core region composed of a glass-reinforced epoxy, the wafer further comprising a first resin layer on a top surface of the core region and a second resin layer on a bottom surface of the core region. The core region and first and second resin layers are substantially non-transparent for a specific range of the electromagnetic spectrum. The wafer further includes vertical transparent regions that extend through the core region and the first and second resin layers and are composed of a material that is substantially transparent for the specific range of the electromagnetic spectrum. The wafer is thinned, for example by polishing, from its top surface and its bottom surface so that a resulting thickness is within a predetermined range without causing glass fibers of the core region to become exposed. Respective optical structures are provided on one or more exposed surfaces of at least some of the transparent regions.

Passivated contact structures and fabrication methods for back contact back junction solar cells are provided. According to one example embodiment, a back contact back junction photovoltaic solar cell is described that has a semiconductor light absorbing layer having a front side and a backside having base regions and emitter regions. A passivating dielectric insulating layer is on the base and emitter regions. A first electrically conductive contact contacts the passivating dielectric insulating layer together having a work function suitable for selective collection of electrons that closely matches a conduction band of the light absorbing layer. A second electrically conductive contact contacts the passivating dielectric insulating layer together having a work function suitable for selective collection of electrons that closely matches a valence band of the light absorbing layer.

An integrated circuit includes a substrate material that includes an epitaxial layer, wherein the substrate material and the epitaxial layer form a first semiconductor material with the epitaxial layer having a first conductivity type. At least one nanowire comprising a second semiconductor material having a second conductivity type doped differently than the first conductivity type of the first semiconductor material forms a junction crossing region with the first semiconductor material. The nanowire and the first semiconductor material form an avalanche photodiode (APD) in the junction crossing region to enable single photon detection. In an alternative configuration, the APD is formed as a p-i-n crossing region where n represents an n-type material, i represents an intrinsic layer, and p represents a p-type material.

Approaches for silicon photonics integration are provided. A method includes: forming at least one encapsulating layer over and around a photodetector; thermally crystallizing the photodetector material after the forming the at least one encapsulating layer; and after the thermally crystallizing the photodetector material, forming a conformal sealing layer on the at least one encapsulating layer and over at least one device. The conformal sealing layer is configured to seal a crack in the at least one encapsulating layer. The photodetector and the at least one device are on a same substrate. The at least one device includes a complementary metal oxide semiconductor device or a passive photonics device.

According to an aspect of the present principles, methods are provided for fabricating an integrated structure. A method includes forming a very large scale integration (VLSI) structure including a semiconductor layer at a top of the VLSI structure. The method further includes mounting the VLSI structure to a support structure. The method additionally includes removing at least a portion of the semiconductor layer from the VLSI structure. The method also includes attaching an upper layer to the top of the VLSI structure. The upper layer is primarily composed of a material that has at least one of a higher resistivity or a higher transparency than the semiconductor layer. The upper layer includes at least one hole for at least one of a photonic device or an electronic device. The method further includes releasing said VLSI structure from the support structure.

A device having a plurality of thin film photovoltaic cells (PV) formed over a passivation layer. The device comprises a plurality of thin film photovoltaic (PV) cells formed over the passivation layer, each PV cell includes at least a lower conducting layer (LCL) and an upper conducting layer (UCL); and a conducting path connecting at least a UCL of a first PV cell to at least a LCL of a second PV cell, wherein at least a first array of PV cells comprised of at least a first portion of the plurality of PV cells is connected by the respective UCL and LCL of each PV cell to provide a first voltage output. In an embodiment the passivation layer is formed over a target integrated circuit (TIC), the TIC having a top surface and a bottom surface.

A semiconductor substrate, an insulating layer made of silicon oxide formed on the semiconductor substrate and a semiconductor layer made of silicon formed on the insulating layer are provided, and the semiconductor layer constitutes an optical waveguide in an optical signal transmission line section and an optical modulator in an optical modulation section. Also, the insulating layer is removed except for a part thereof to have a hollow structure with a cavity, and both side surfaces and a lower surface of each of the semiconductor layers constituting the optical waveguide and the optical modulator are exposed and covered with air.

A solar battery module and manufacturing method for a solar battery module having improved output are provided. The solar battery module 1 is a transparent substrate 10, transparent resin layer 13b, solar battery cell 12, colored resin layer 13a and back sheet 11 laminated in this order. The light-receiving surface 12a of the solar battery cell 12 faces the transparent resin layer 13b side. The backside 12b of the solar battery cell faces the colored resin layer 13a. The MFR [melt flow rate] of the transparent resin layer 13b is lower than the MFR of the colored resin layer 13a.

An optoelectronic component including a connection carrier comprising a structured carrier strip in which interspaces are filled with an electrically insulating material and an optoelectronic semiconductor chip attached and electrically connected to a top portion of the connection carrier, wherein the electrically insulating material terminates substantially flush with the carrier strip in places or the carrier strip projects beyond the electrically insulating material, and the carrier strip is not covered by the electrically insulating material on the top portion and/or on a bottom portion of the connection carrier.

A barrier film layer, a photoelectric device comprising the barrier film layer and a manufacturing method of the photoelectric device are provided. A material forming the barrier film layer includes a topological insulator, and the barrier film layer is formed on a surface of an base plate which is patterned. In this way, a better package of the photoelectric device can be achieved.