A semiconductor chip includes a substrate and a transistor. The transistor is formed on the substrate and includes an insulation layer and a fin. The fin includes a base portion and a protrusion connected with the base portion, wherein the protrusion is projected with respect to an upper surface of the base portion and has a recess recessed with respect to the upper surface.

A display substrate and a preparation method thereof, and a display apparatus. The display substrate includes a base substrate, at least one insulating film layer disposed on the base substrate, and a first electrode disposed on a side of the at least one insulating film layer away from the base substrate; wherein a concave-convex structure is disposed on a side of the at least one insulating film layer away from the base substrate, and there is an overlapping area between an orthographic projection of the concave-convex structure on the base substrate and an orthographic projection of the first electrode on the base substrate.

A light device solvent, a light emitting device ink comprising same, and a method for manufacturing a display device are provided. A method for manufacturing a display device comprises the acts of: spraying a device ink, which comprises a first element solvent and a light emitting element dispersed in the first element solvent, onto a target substrate having a first electrode and a second electrode thereon; forming a second element solvent, which has an isomeric structure of the molecular structure of the first element solvent, and loading the light emitting element on the first electrode and the second electrode; and removing the second element solvent.

Provided are a display panel and a display device. The display panel includes a substrate and a drive circuit disposed on one side of the substrate. The drive circuit includes a first transistor. The first transistor includes a first active layer. The first active layer includes an oxide semiconductor. The drive circuit also includes a first capacitor. One capacitor plate of the first capacitor is disposed in the same layer as the first active layer. In the display panel according to embodiments of the present disclosure, a substrate of a first capacitor in a drive circuit is disposed in the same layer as an active layer of an oxide semiconductor.

According to example embodiments, an integrated circuit includes a continuous active region extending in a first direction, a tie gate electrode extending in a second direction crossing the first direction on the continuous active region, a source/drain region provided adjacent the tie gate electrode, a tie gate contact extending in a third direction perpendicular to the first direction and the second direction on the continuous active region and connected to the tie gate electrode, a source/drain contact extending in the third direction and connected to the source/drain region, and a wiring pattern connected to each of the tie gate contact and the source/drain contact and extending in a horizontal direction. A positive supply power is applied to the wiring pattern.

A display device includes pixel areas; and a pixel disposed in each of the pixel areas. The pixel includes a first electrode and a second electrode disposed on a substrate and disposed on a same layer, a light emitting element disposed on the first electrode and the second electrode, a third electrode electrically connecting the first electrode to a first end of the light emitting element, a fourth electrode electrically connecting the second electrode to a second end of the light emitting element, and an electrode pattern and the electrode pattern and one of the third electrode and the fourth electrode being disposed on a same layer.

A display panel and a display device are provided. The display panel includes: a plurality of first pixel units, a plurality of second pixel units, a plurality of third pixel units and a plurality of first data lines. An effective light-emitting area of the first pixel unit is larger than an effective light-emitting area of the second pixel unit, and larger than an effective light-emitting area of the third pixel unit; orthographic projection of the first data line on the base substrate is not overlapped with an orthographic projection of any one of the first electrode of the first pixel unit, the first electrode of the second pixel unit, and the first electrode of the third pixel unit on the base substrate.

A display panel and a display device are provided. The display panel includes: a display region; a peripheral region surrounding the display region; a plurality of pixel units, located in the display region and configured to display an image; a plurality of data lines, electrically connected with the plurality of pixel units and configured to input data signals to the plurality of pixel units; a plurality of data transmission lines, located in the peripheral region and connected with the plurality of data lines; and at least two repair structures, wherein each of the at least two repair structures includes a first repair line and a second repair line, the first repair line is overlapped with the plurality of data transmission lines, and the second repair line is overlapped with the plurality of data lines.

The display device according to the embodiment may include a substrate, a first planarization layer containing the first opening on the substrate, a first assembly wiring and a second assembly wiring arranged spaced apart from each other inside the first opening and on the first planarization layer, a second planarization layer covering a portion of the first assembly wiring and the second assembly wiring and including a second opening, a light emitting device disposed inside the second opening, wherein the first electrode overlaps the first assembly wiring and the second assembly wiring, and an insulation layer covering the first assembly wiring or second assembly wiring placed inside the first opening Insulation layer covering the first assembly wiring or second assembly wiring placed inside the first opening, and the first electrode is bonded to one of the first assembly wiring and the second assembly wiring.

An engineered substrate structure includes a ceramic substrate having a front surface characterized by a plurality of peaks. The ceramic substrate includes a polycrystalline material. The engineered substrate structure also includes a planarization layer comprising a planarization layer material and coupled to the front surface of the ceramic substrate. The planarization layer defines fill regions filled with the planarization layer material between adjacent peaks of the plurality of peaks on the front surface of the ceramic substrate. The engineered substrate structure further includes a barrier shell encapsulating the ceramic substrate and the planarization layer, wherein the barrier shell has a front side and a back side, a bonding layer coupled to the front side of the barrier shell, a single crystal layer coupled to the bonding layer, and a conductive layer coupled to the back side of the barrier shell.