H10D86/00

Low temperature poly-silicon (LTPS) thin film transistor based liquid crystal display

An array substrate comprises a substrate, a common electrode formed on the substrate, a light shielding layer disposed on the common electrode, an insulating layer disposed on the light shielding layer and the common electrode, a poly-silicon layer, a gate insulating layer, a gate connected with the common electrode by a hole, a medium layer and a source drain. A method for manufacturing the array substrate comprises forming a transparent conductive layer and a first metallic layer on the substrate, forming patterned common electrode and light shielding layer by multiple steps of etching so that a process of photomask can be saved, and forming holes connecting with the common electrode and the gate by a photomask etching process, then manufacturing a medium layer and a source drain. The method adopts seven processes of photomask so that the process is simplified, and the cost is lowered.

Thin film transistor having germanium thin film and manufacturing method thereof, array substrate, display device

A thin film transistor and manufacturing method thereof, an array substrate and a display device are provided. In the manufacturing method of the thin film transistor, manufacturing an active layer includes: forming a germanium thin film, and forming pattern of the active layer through a patterning process; conducting a topological treatment on the germanium thin film with a functionalized element, so as to obtain the active layer (4) with topological semiconductor characteristics. The resultant thin film transistor has a higher carrier mobility and a better performance.

Semiconductor-Metal-On-Insulator Structures, Methods of Forming Such Structures, and Semiconductor Devices Including Such Structures

Methods for fabricating semiconductor-metal-on-insulator (SMOI) structures include forming an acceptor wafer including an insulator material on a first semiconductor substrate, forming a donor wafer including a conductive material and an amorphous silicon material on a second semiconductor substrate, and bonding the amorphous silicon material of the donor wafer to the insulator material of the acceptor wafer. SMOI structures formed from such methods are also disclosed, as are semiconductor devices including such SMOI structures.

REPAIRING METHODS OF DEFECTIVE PIXELS HAVING LIGHT SPOTS, ARRAY SUBSTRATES AND LIQUID CRYSTAL PANELS

A repairing method of defective pixels having light spots includes: connecting the pixel electrode and a drain electrode of the of the TFT via a point welding method; cutting off the continuous common electrode to divide the common electrode within the switch area and the common electrode within the pixel area; and removing the pixel electrode arranged above intersections of the common electrode, and connecting the pixel electrode within the switch area and the pixel electrode within pixel area. In addition, an array substrate and a liquid crystal panel are disclosed. By cutting off the common electrode within the pixel area switch area and the pixel area, the defective pixels having light spots are eliminated. In addition, such defective pixels are repaired to be pixels capable of emitting light normally.

Active matrix display device

A display driving circuit having a shift register is formed on the display panel. The shift register includes a first stage having first and second transistors and a second stage having a third and fourth transistor. A voltage of a control electrode of the first transistor is boosted by a voltage of a first pulse line changing from low to high. In an On state, the second transistor connects the control electrode of the first transistor and a constant voltage line. A voltage of a control electrode of the third transistor is boosted by a voltage of a second pulse line changing from low to high. In an On state, the fourth transistor connects the control electrode of the third transistor and a constant voltage line. The fourth transistor is switched on by a signal from the first stage.

Element substrate and light-emitting device

A potential of a gate of a driving transistor is fixed, and the driving transistor is operated in a saturation region, so that a current is supplied thereto anytime. A current control transistor operating in a linear region is disposed serially with the driving transistor, and a video signal for transmitting a signal of emission or non-emission of the pixel is input to a gate of the current control transistor via a switching transistor.

Semiconductor device and method of manufacturing same
09698199 · 2017-07-04 · ·

A semiconductor device including a transistor on a main surface side of a semiconductor substrate; and a resistance change element on a back-surface side of the semiconductor substrate, wherein the transistor includes a low-resistance section in the semiconductor substrate, the low-resistance section extending to the back surface of the semiconductor substrate, an insulating film is provided in contact with a back surface of the low-resistance section, the insulating film has an opening facing the low-resistance section, and the resistance change element is connected to the low-resistance section through the opening.

Array substrate, method for manufacturing the same, and display apparatus

A method for manufacturing an array substrate includes coating a photoresist onto an insulation layer including a gate insulation layer and an etch stop layer, wherein the gate insulation layer covers a conductive pattern and the etch stop layer covers a semiconductive pattern. The method further includes exposing the photoresist to form a photoresist partially-reserved region and a photoresist unreserved region. The method further includes performing a first etching process to at least partially remove a portion of the insulation layer located at a position corresponding to the photoresist unreserved region, to form an intermediate hole. The method further includes performing a second etching process to form the first via hole and form the second via hole at a position of the intermediate hole, thereby to reveal the semiconductive pattern and the conductive pattern at positions corresponding to the first via hole and the second via hole, respectively.

Array substrate, method for manufacturing the same, liquid crystal display panel

The present invention provides an array substrate, a method for manufacturing the same, and a liquid crystal display panel. The array substrate includes a plurality of pixel units arranged in an array, each pixel unit comprising a reflection region and a transmission region, and for any pixel unit, the array substrate comprising a substrate; a thin film transistor provided on the substrate; and a reflection electrode and a first transparent electrode which are electrically connected with each other, the reflection electrode being located in the reflection region, and the first transparent electrode being located in the transmission region, wherein a first transparent insulation layer is provided between the reflection electrode and the first transparent electrode, and the reflection electrode is on a side of the first transparent insulation layer which is closer to the substrate.

Liquid crystal display panel, array substrate and manufacturing method for thin-film transistor

An LCD panel, an array substrate and a manufacturing method for TFT are disclosed. The method includes: providing a substrate; forming a first metal layer on the substrate, wherein the first metal layer includes an aluminum metal layer, an aluminum oxide layer and a molybdenum metal layer stacked sequentially; patterning the first metal layer to form a gate electrode of a TFT; sequentially forming a gate insulation layer, a semiconductor layer and an ohmic contact layer on the gate electrode; forming a second metal layer on the ohmic contact layer; and patterning the second metal layer to form a source electrode and a drain electrode of the TFT. The present invention can inhibit hillock generated by the aluminum metal layer in a high temperature environment, avoid the short circuit generated among the gate, the source and the drain electrodes of the TFT to ensure the display quality of an image.