A method and an apparatus for processing a peripheral portion of a substrate, such as a wafer, are disclosed. The substrate processing method includes: holding a substrate on a substrate stage; rotating the substrate stage and the substrate about an axis of the substrate stage; directing a laser beam to an edge portion of the rotating substrate to form an annular crack in the substrate; and pressing a polishing tool against the edge portion of the rotating substrate to form a stepped recess in a peripheral portion of the substrate.

A method and an apparatus for processing a peripheral portion of a substrate, such as a wafer, are disclosed. The substrate processing method includes: holding a substrate on a substrate stage; rotating the substrate stage and the substrate about an axis of the substrate stage; directing a laser beam to an edge portion of the rotating substrate to form an annular crack in the substrate; and pressing a polishing tool against the edge portion of the rotating substrate to form a stepped recess in a peripheral portion of the substrate.

The present invention relates to a CMP polishing liquid for polishing a substrate comprising at least a barrier metal, a metal film, and a silicon dioxide film or a substrate comprising at least a barrier metal, a metal film, a silicon dioxide film, and a low-k film, wherein: the polishing liquid contains abrasive particles, a metal oxide dissolving agent, an oxidizing agent, a water-soluble polymer, and an alkali metal ion; the surface potentials of the abrasive particles and the metal film upon polishing have the same sign and the product of the surface potential (mV) of the abrasive particles and the surface potential (mV) of the metal film is 250 to 10000; and pH is 7.0 to 11.0.

The present invention provides a polishing composition that can polish an object to be polished at a high polishing speed with fewer scratches (defects). The present invention relates to a polishing composition including silica and a dispersing medium, the polishing composition having, when analyzed by pulse NMR spectroscopy, a specific relaxation rate (R.sub.2sp) of from 1.60 to 4.20 as determined by the following Formula (1):

R.sub.2sp=(R.sub.(silica))/(R.sub.(medium))1 Formula (1):

wherein R(.sub.silica) represents the reciprocal of the relaxation time of silica (unit:/millisecond), and R(.sub.medium) represents the reciprocal of the relaxation time of the dispersing medium (unit:/millisecond).

Methods for strengthening edges of a laminated glass article comprising a glass core layer positioned between a first glass clad layer and a second glass clad layer are disclosed. The methods may comprise polishing the cut edges of the laminated glass article with a slurry of polishing media applied to the edges of the laminated glass article with brushes. An edge strength of the laminated glass article is greater than or equal to about 400 MPa after polishing.

Methods for strengthening edges of a laminated glass article comprising a glass core layer positioned between a first glass clad layer and a second glass clad layer are disclosed. The methods may comprise polishing the cut edges of the laminated glass article with a slurry of polishing media applied to the edges of the laminated glass article with brushes. An edge strength of the laminated glass article is greater than or equal to about 400 MPa after polishing.

A wafer processing method uses a chuck table with smaller diameter than a semiconductor wafer to be processed. A cut through edge trimming is therefore implemented on the periphery of the semiconductor wafer to form a cut through straight side at the periphery and also form a flat portion at the periphery as a positioning means for taping and backside grind processes.

Provided is a method that is for polishing a silicon wafer by a polishing device using a carrier holding the silicon wafer, and that can reduce wear on the carrier. In this polishing method, a polishing liquid used in the polishing device contains 0.1-5 mass %, in terms of the concentration of silica, silica particles comprising: silica particles (A) having an average primary particle size of 4-30 nm as measured by BET, and having an (X2/X1) ratio of 1.2-1.8, where X2 (nm) represents an average particle size along the major axis thereof as calculated from a perspective projection image obtained using an electron beam, and X1 (nm) represents the average primary particle size as measured by BET; and silica particles (B) having an average primary particle size of more than 30 nm but not more than 50 nm as measured by BET, and having a (X2/X1) ratio of 1.2-1.8, where X2 (nm) represents an average particle size along the major axis thereof as calculated from a perspective projection image obtained using an electron beam, and X1 (nm) represents the average primary particle size as measured by BET, wherein the mass ratio of the silica particles (A) to the silica particles (B) is 100:0 to 85:15.

The present invention provides a manufacturing method of a semiconductor chip, in which the manufacturing yield is excellent, and a kit. According to the present invention, a manufacturing method of a semiconductor chip includes Process 1 of forming an insulating layer on a base material, Process 2 of forming a patterned resist film on the insulating layer, Process 3 of forming the insulating layer having an opening portion by etching the insulating layer with the patterned resist film as a mask, Process 4 of removing the patterned resist film, Process 5 of filling the opening portion of the insulating layer with metal, and Process 6 of performing chemical-mechanical polishing on the insulating layer filled with metal. In at least one process of Process 1 to Process 6, a chemical liquid which includes an organic solvent and metal impurities including at least one metal atom selected from the group consisting of a Fe atom, a Cr atom, a Ni atom, and a Pb atom, and in which the total content of the metal atom is 0.001 to 100 mass ppt is used.

The present invention provides a manufacturing method of a semiconductor chip, in which the manufacturing yield is excellent, and a kit. According to the present invention, a manufacturing method of a semiconductor chip includes Process 1 of forming an insulating layer on a base material, Process 2 of forming a patterned resist film on the insulating layer, Process 3 of forming the insulating layer having an opening portion by etching the insulating layer with the patterned resist film as a mask, Process 4 of removing the patterned resist film, Process 5 of filling the opening portion of the insulating layer with metal, and Process 6 of performing chemical-mechanical polishing on the insulating layer filled with metal. In at least one process of Process 1 to Process 6, a chemical liquid which includes an organic solvent and metal impurities including at least one metal atom selected from the group consisting of a Fe atom, a Cr atom, a Ni atom, and a Pb atom, and in which the total content of the metal atom is 0.001 to 100 mass ppt is used.