A method for manufacturing a substrate for surface-enhanced Raman spectography, includes creating a supporting structure including microstructured pattern including a top and sidewalls; depositing a multilayer on the supporting structure with the multilayer including two metal layers and an intermediate layer arranged between the two metal layers, with the intermediate layer being carried out in a material that can be selectively etched with respect to the metal layers; etching a portion of the multilayer deposited on the top of the microstructured pattern in such a way as to expose ends each layer of the multilayer; selective etching of the ends of the intermediate layers in such a way as to form cavities between the ends of two successive metal layers.

Subject matter disclosed herein may relate to correlated electron switch devices, and may relate more particularly to integrated circuit fabrics including correlated electron switch devices having various impedance characteristics.

An electromechanical device comprises a substrate structure, a set of electrodes, one or more anchor trenches, and one or more multi-faced components. For example, each of the one or more multi-faced components comprises an isolation region formed on a first portion of the surface of the component, a high resistance region formed on a second portion of the surface of the component, and a low resistance region formed on a third portion of the surface of the component. For example, the synapse device is configured to provide an analog resistive output, ranging between the high resistance region and the low resistance region, from at least one of the set of electrodes in response to a pulsed voltage input to at least another one of the set of electrodes.

A technique relates to a semiconductor device. First metal contacts are formed on top of a substrate. The first metal contacts are arranged in a first direction, and the first metal contacts are arranged such that areas of the substrate remain exposed. Insulator pads are positioned at predefined locations on top of the first metal contacts, such that the insulator pads are spaced from one another. Second metal contacts are formed on top of the insulator pads, such that the second metal contacts are arranged in a second direction different from the first direction. The first and second metal contacts sandwich the insulator pads at the predefined locations. Surface-sensitive conductive channels are formed to contact the first metal contacts and the second metal contacts. Four-terminal devices are defined by the surface-sensitive conductive channels contacting a pair of the first metal contacts and contacting a pair of the metal contacts.

Subject matter disclosed herein may relate to correlated electron switches that are capable of asymmetric set or reset operations.

The inventive concept shows the embodiment of t-switch which is a MIT 3-terminal device based on a Hole-driven MIT theory and a technology for removing an ESD noise signal which is one of applications of the t-switch. The t-switch includes three terminals of Inlet, Outlet and Control, and a metal-insulator transition (MIT) occurs at an Outlet layer by a current flowing through the Control terminal. In the t-switch, a high resistor is connected to the Control terminal and thereby an ESD noise signal of high voltage flows through the Inlet-Outlet without damaging the device.

Tunneling field effect transistors (TFETs) including a variable bandgap channel are described. In some embodiments, one or more bandgap characteristics of the variable bandgap channel may be dynamically altered by at least one of the application or withdrawal of a force, such as a voltage or electric field. In some embodiments the variable bandgap channel may be configured to modulate from an ON to an OFF state and vice versa in response to the application and/or withdrawal of a force. The variable bandgap channel may exhibit a bandgap that is smaller in the ON state than in the OFF state. As a result, the TFETs may exhibit one or more of relatively high on current, relatively low off current, and sub-threshold swing below 60 mV/decade.

Electrolyte gating with ionic liquids is a powerful tool for inducing conducting phases in correlated insulators. An archetypal correlated material is VO.sub.2 which is insulating only at temperatures below a characteristic phase transition temperature. We show that electrolyte gating of epitaxial thin films of VO.sub.2 suppresses the metal-to-insulator transition and stabilizes the metallic phase to temperatures below 5 K even after the ionic liquid is completely removed. We provide compelling evidence that, rather than electrostatically induced carriers, electrolyte gating of VO.sub.2 leads to the electric field induced creation of oxygen vacancies, and the consequent migration of oxygen from the oxide film into the ionic liquid.

Provided are a integrated plasmonic circuit including a plasmonic source using a surface plasmon resonance phenomenon, a plasmonic detector detecting an optical signal generated in the plasmonic source, and a link structure between the plasmonic source and the plasmonic detector, that is, a signal transferring part, and a method of manufacturing the same. Provided are a integrated plasmonic circuit capable of realizing both of miniaturization and speed improvement by overcoming both of a limitation of an electronic device in terms of a signal speed in spite of being excellent in terms of miniaturization efficiency and a limitation of an existing optical device in terms of miniaturization due to a diffraction limitation of light in spite of being improved in terms of a signal speed, and a method of manufacturing the same.

A device for detecting a surface plasmon and polarization includes: a topological insulating layer formed on a substrate; first and second electrodes formed on the topological insulating layer; and a waveguide connected to the topological insulating layer between the first and second electrodes.