Various implementations described herein are directed to a device having a multi-layered structure that may be formed on a substrate. The multi-layered structure may have a switching layer, and the switching layer may be formed with correlated electron material (CEM). The multi-layered structure may have at least one barrier layer, and the at least one barrier layer may be referred to as at least one hydrogen barrier layer.

Described herein are devices incorporating plasmon Casimir cavities, which modify the distribution of allowable plasmon modes within the cavities. The plasmon Casimir cavities can drive charge carriers from or to an electronic device adjoining the plasmon Casimir cavity by modifying the distribution of zero-point energy-driven plasmons on one side of the electronic device to be different from the distribution of zero-point energy-driven plasmons on the other side of the electronic device. The electronic device can exhibit a structure that permits transport or capture of carriers in very short time intervals, such as in 1 picosecond or less.

Disclosed is a method for the fabrication of a correlated electron material (CEM) switching device, the method comprising: forming a layer of a conductive substrate; forming a layer of a correlated electron material on the conductive substrate; forming a layer of a conductive overlay on the layer of correlated electron material; and patterning the layers whereby to form a stack comprising a conductive substrate, a CEM layer and a conductive overlay, wherein the patterning comprises the following steps: forming a hard mask on the layer of the conductive overlay; dry etching the layer of conductive overlay and the layer of correlated electron material whereby to form a partially formed stack; depositing a coating of a protective polymer over at least sidewalls of the partially formed stack; and dry etching the layer of conductive substrate.

A thermal emitter including a substrate and a grating arranged atop the substrate, the grating includes a plurality of equidistant structures having a cross-section with a trapezoid shape. Material of the substrate and the grating converts incoming heat into radiation.

Subject matter disclosed herein may relate to correlated electron switches that are capable of asymmetric set or reset operations.

Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack including a quantum well layer, a doped layer, and a barrier layer disposed between the doped layer and the quantum well layer; and gates disposed above the quantum well stack. The doped layer may include a first material and a dopant, the first material may have a first diffusivity of the dopant, the barrier layer may include a second material having a second diffusivity of the dopant, and the second diffusivity may be less than the first diffusivity.

Subject matter disclosed herein may relate to programmable fabrics including correlated electron switch devices.

A first aspect provides a topological quantum computing device comprising a network of semiconductor-superconductor nanowires, each nanowire comprising a length of semiconductor formed over a substrate and a coating of superconductor formed over at least part of the semiconductor; wherein at least some of the nanowires further comprise a coating of ferromagnetic insulator disposed over at least part of the semiconductor. A second aspect provides a method of fabricating a quantum or spintronic device comprising a heterostructure of semiconductor and ferromagnetic insulator, by: forming a portion of the semiconductor over a substrate in a first vacuum chamber, and growing a coating of the ferromagnetic insulator on the semiconductor by epitaxy in a second vacuum chamber connected to the first vacuum chamber by a vacuum tunnel, wherein the semiconductor comprises InAs and the ferromagnetic insulator comprises EuS.

A semiconductor layer (2,3) is provided on a substrate (1). A gate electrode (4), a source electrode (5) and a drain electrode (6) are provided on the semiconductor layer (3). A strongly correlated electron system material (12) is connected between the gate electrode (4) and the source electrode (5).

Subject matter disclosed herein may relate to fabrication of correlated electron materials used, for example, to perform a switching function. In embodiments, processes are described, which may be useful in avoiding formation of a potentially resistive oxide layer at an interfacial surface between a conductive substrate, for example, and a correlated electron material.