A semiconductor device includes a substrate, a channel layer, an insulating layer, source/drain contacts, a gate dielectric layer, and a gate electrode. The channel layer over the substrate and includes two dimensional (2D) material. The insulating layer is on the channel layer. The source/drain contacts are over the channel layer. The gate dielectric layer is over the insulating layer and the channel layer. The gate electrode is over the gate dielectric layer and between the source/drain contacts.

An aspect of the disclosure relates to an integrated circuit. The integrated circuit includes a first electrically conductive structure, a thin film crystal layer located on the first electrically conductive structure, and a second electrically conductive structure including metal e.g. copper. The second electrically conductive structure is located on the thin film crystal layer. The first electrically conductive structure is electrically connected to the second electrically conductive structure through the thin film crystal layer. The thin film crystal layer may be provided as a copper diffusion barrier.

Embodiments described herein relate to engineering metal oxide layer interfaces to improve electronic device stability. For example, a transistor device can include a base structure and a metal oxide layer disposed on the base structure. The metal oxide layer includes at least one region having a gradient profile with respect to oxygen (O.sub.2) composition.

Disclosed are a thin film transistor (TFT) including an oxide semiconductor layer capable of being applied to high-resolution flat panel display devices requiring high-speed driving, a gate driver including the TFT, and a display device including the gate driver. The TFT includes first oxide semiconductor layer consisting of indium-gallium-zinc-tin oxide (IGZTO) and a second oxide semiconductor layer including indium-gallium-zinc oxide (IGZO). A content ratio (Ga/In) of gallium (Ga) to indium (In) of the second oxide semiconductor layer is higher than a content (Ga/In) of Ga to In of the first oxide semiconductor layer, and a content ratio (Zn/In) of zinc (Zn) to In of the second oxide semiconductor layer is higher than a content (Zn/In) of Zn to In of the first oxide semiconductor layer.

In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.

A thin film transistor is provided. The thin film transistor includes an oxide semiconductor layer including a source region, a drain region, and a channel region wherein a portion of the source and drain regions has an oxygen concentration less than the channel region. Further provided is a thin film transistor that includes an oxide semiconductor layer including a source region, a drain region, and a channel region, wherein a portion of the source and drain regions includes a dopant selected from the group consisting of aluminum, boron, gallium, indium, titanium, silicon, germanium, tin, lead, and combinations thereof.

A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A first multi-component oxide semiconductor layer is formed over a substrate and a single-component oxide semiconductor layer is formed thereover; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500 C. to 1000 C. inclusive, preferably 550 C. to 750 C. inclusive so that a first multi-component oxide semiconductor layer including single crystal regions and a single-component oxide semiconductor layer including single crystal regions are formed; and a second multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions.

The present invention provides an array substrate and a manufacturing method thereof and a display device. The manufacturing method comprises: forming a pattern including a pixel electrode and a source of a thin film transistor on a base substrate through a single patterning process, the pixel electrode is provided in a layer under a layer in which the source is located; forming a pattern including a drain, an active layer, a gate insulation layer and a gate of the thin film transistor through a single patterning process, the active layer covers the source and the drain, and is separated from the gate through the gate insulation layer; and forming a pattern including a passivation layer, a common electrode and a gate line through a single patterning process, the common electrode is a slit electrode and separated from the active layer and the pixel electrode through the passivation layer.

To provide a transistor having highly stable electric characteristics and also a miniaturized structure. Further, also high performance and high reliability of a semiconductor device including the transistor can be achieved. The transistor is a vertical transistor in which a first electrode having an opening, an oxide semiconductor layer, and a second electrode are stacked in this order, a gate insulating layer is provided in contact with side surfaces of the first electrode, the oxide semiconductor layer, and the second electrode, and a ring-shaped gate electrode facing the side surfaces of the first electrode, the oxide semiconductor layer, and the second electrode with the gate insulating layer interposed therebetween is provided. In the opening in the first electrode, an insulating layer in contact with the oxide semiconductor layer is embedded.

A self-aligned transistor including an oxide semiconductor film, which has excellent and stable electrical characteristics, is provided. A semiconductor device is provided with a transistor that includes an oxide semiconductor film, a gate electrode overlapping with part of the oxide semiconductor film, and a gate insulating film between the oxide semiconductor film and the gate electrode. The oxide semiconductor film includes a first region and second regions between which the first region is positioned. The second regions include an impurity element. A side of the gate insulating film has a depressed region. Part of the gate electrode overlaps with parts of the second regions in the oxide semiconductor film.