Patent classifications
H10P50/00
METHOD OF OVERLAY MEASUREMENT
A method includes depositing an inter-metal dielectric (IMD) layer over a conductive line. A via opening is formed in the IMD layer and directly over the conductive line. A width of the conductive line is greater than a width of the via opening. An overlay measurement is performed. The overlay measurement includes obtaining a backscattered electron image of the via opening and the conductive line and determining an overlay between the via opening and the conductive line according to the backscattered electron image.
OXIDE FILM ETCHING METHOD AND SUBSTRATE PROCESSING APPARATUS
An oxide film etching method includes: forming a protective film of a metal or a metal nitride that does not contain silicon so as to cover a protection target film, among the protection target film containing silicon and a silicon-containing oxide film exposed on a surface of a substrate; supplying, to the substrate, a mixed gas including a hydrogen fluoride gas and an ammonia gas to react with the silicon-containing oxide film, and modifying the oxide film to generate a reaction product; and sublimating and removing the reaction product.
FORMATION OF ANGLED GRATINGS
Systems and methods discussed herein can be used to form gratings at various slant angles across a grating material on a single substrate by determining an ion beam angle and changing the angle of an ion beam among and between ion beam angles to form gratings with varying angles and cross-sectional geometries. The substrate can be rotated around a central axis, and one or more process parameters, such as a duty cycle of the ion beam, can be modulated to form a grating with a depth gradient.
Photolithographic exposure method for memory
A photolithographic exposure method for a memory. In a photolithographic process for making a memory, when exposure is performed by using a mask, regions with different exposure dimension requirements on the memory are divided into different exposure groups. Regions with the same exposure resolution requirement are divided into the same group. Different exposure modes of exposure that are capable of correspondingly satisfying resolution requirements of each group are performed to different groups during exposure. During exposure, different illumination modes are adopted to perform exposure. Firstly, a first exposure mode is adopted to perform exposure to a memory array cell exposure group, then a wafer is kept stationary on a supporting platform, and then a second exposure mode is adopted to perform exposure to the other structure exposure group; after the exposure of all groups is completed, one-step development is performed to complete pattern transfer.
Plasma processing method and plasma processing apparatus
A plasma processing method according to the present disclosure is performed with a plasma processing apparatus, and includes: (a) preparing a substrate on a substrate support in the chamber, the substrate having an etching target film including a first silicon-containing film, and a first metal-containing film on the etching target film, the first metal-containing film including an opening pattern; and (b) etching the etching target film. (b) includes supplying a processing gas including one or more gases containing carbon, hydrogen, and fluorine into the chamber to form a plasma from the processing gas within the chamber and etch the first silicon-containing film to form the opening pattern in the first silicon-containing film, and a ratio of the number of hydrogen atoms to the number of fluorine atoms in the processing gas is 0.3 or more.
Method of manufacturing integrated circuit device
A method of manufacturing an integrated circuit device includes preparing a semiconductor substrate having an active area and a field area, sequentially forming a lower insulation layer, a buried layer, a first sacrificial layer, a second sacrificial layer, and a third sacrificial layer on the semiconductor substrate, removing a portion of the third sacrificial layer to form a first sacrificial pattern, removing a portion of the second sacrificial layer and the first sacrificial pattern to form a second sacrificial pattern, removing a portion of the first sacrificial layer and the second sacrificial pattern to form a third sacrificial pattern, removing a portion of the buried layer and the third sacrificial pattern to form a buried pattern, and removing a portion of the lower insulation layer and a portion of the semiconductor substrate by using the buried pattern as an etch mask to form a word line trench.
Method for fabricating semiconductor device
A method for fabricating a semiconductor device includes the steps of forming a magnetic tunneling junction (MTJ) on a substrate, forming a spin orbit torque (SOT) layer on the MTJ, forming an inter-metal dielectric (IMD) layer around the MTJ and the SOT layer, forming a first hard mask on the IMD layer, forming a semiconductor layer on the first hard mask, and then patterning the first hard mask.
Method for selective etching by local photon surface activation
A method for manufacturing semiconductor devices is disclosed. The method includes providing, in a chamber, a substate covered by a patterned mask. The method includes applying, in the chamber, radiation locally on a portion of the substate that is not covered by the patterned mask. The method includes etching, in the chamber, the portion of the substate through a dry etching process.
RESIST UNDERLAYER FILM-FORMING COMPOSITION
A resist underlayer film-forming composition for use in EB or EUV lithography, the resist underlayer film-forming composition containing a polymer having a structure represented by formula (1) below, and a solvent.
##STR00001##
In formula (1), R.sup.1 and R.sup.2 each independently represent an alkyl group which has 1 to 6 carbon atoms and may be substituted with a halogen atom, or a halogen atom, m1 and m2 each independently represent an integer of 0 to 4, when there are two or more R.sup.1's, the two or more R.sup.1's may be the same or different, when there are two or more R.sup.2's, the two or more R.sup.2's may be the same or different, and * represents a bond.
ETCHING METHOD AND ETCHING DEVICE
An etching method includes (a) providing a substrate into a chamber. The substrate includes an underlying film, a silicon-containing film on the underlying film, and a mask on the silicon-containing film. The etching method includes (b) etching the silicon-containing film with first plasma generated from a first process gas including a hydrogen fluoride gas and a tungsten-containing gas to form a recess, and (c) etching, after (b), the silicon-containing film further with second plasma generated from a second process gas including a hydrogen fluoride gas. The second process gas is free of a tungsten-containing gas or includes a tungsten-containing gas at a flow rate lower than a flow rate of the tungsten-containing gas in the first process gas.