A wet etching chemistry to selectively remove a polymer residue on an opening embedded in a low-k dielectric layer and an underlying stop layer in a process of forming an interconnect structure is provided. The wet etching chemistry includes: two type of organic solvents, wherein a concentration of the two type of organic solvents is greater than or equal to 70%; an Alkali source amine, at least comprising a tertiary amine; an inhibitor; and water. In some embodiment, the wet etching chemistry is free of a peroxide to avoid damage to the WdC hard mask.

A semiconductor device includes a peripheral circuit structure, a memory cell array disposed over the peripheral circuit structure, and a bonding structure disposed between the peripheral circuit structure and the memory cell array. The memory cell array includes a first stack structure including first interlayer insulating layers and first conductive patterns disposed alternately with each other in a first direction over the bonding structure, second conductive patterns separated from each other in a horizontal direction between the first stack structure and the bonding structure, each of the second conductive patterns comprising electrode portions spaced apart from in the first direction and a connection portion extending in the first direction to couple the electrode portions, a vertical channel passing through the first stack structure and the electrode portions of each of the second conductive patterns, and a separation insulating layer disposed between the second conductive patterns.

A composition for forming a protective film using a polymer having an imide group: cured under a film-forming condition in air and an inert gas; forming a protective film having excellent heat resistance, embedding and planarization ability for a pattern formed on a substrate, and good adhesiveness to the substrate; and forming a protective film having excellent resistance against an alkaline aqueous hydrogen peroxide. A composition for forming a protective film against alkaline aqueous hydrogen peroxide, including: (A) a polymer having a repeating unit represented by general formula (1A) having at least one or more fluorine atoms and at least one or more hydroxy groups, a terminal group is any one of the following general formulae (1B) and (1C); and organic solvent, wherein R.sub.1 represents any one group represented by the following formula (1D), and two or more kinds of R.sub.1 are optionally used in combination,

##STR00001## wherein R.sub.1 represents any one group represented by the following formula (1D), and two or more kinds of R.sub.1 are optionally used in combination.

##STR00002##

A method of fabricating a semiconductor device includes forming a first shallow trench isolation structure in a first region of a substrate and second shallow trench isolation structures in a second region of the substrate. The method also includes forming a mask layer over the substrate, the first shallow trench isolation structure, and the second shallow trench isolation structures. The method further includes etching the mask layer and second shallow trench isolation structures in the second region sequentially to form a semiconductor protrusion between the second shallow trench isolation structures.

Provided in the present disclosure are a gas, a gas combination for plasma etching, an etching method and semiconductor equipment, belonging to the field of plasma etching. In the etching process, one or more of a carbonyl halide, an acyl halide and a carboxylic acid halide are provided as process gases and are excited to form a plasma to etch a layer to be etched, so that the problem of inconsistency between the top and the bottom caused by the fact that the etching rate of the bottom is quite different from the etching rate of the middle part when etching is performed to a certain extent to form a high-aspect-ratio hole or groove is solved, the morphology of high-aspect-ratio etching is significantly improved, the collimation is ensured, and the effectiveness of the semiconductor structure is improved.

A conductive gate over a semiconductor fin is cut into a first conductive gate and a second conductive gate. An oxide is removed from sidewalls of the first conductive gate and a dielectric material is applied to the sidewalls. Spacers adjacent to the conductive gate are removed to form voids, and the voids are capped with a dielectric material to form air spacers.

A method for fabricating a semiconductor device includes forming a first interlayer insulating layer including a trench on a substrate, forming a contact plug inside the trench, forming a first wiring pattern on the contact plug, forming a second interlayer insulating layer surrounding side walls of the first wiring pattern on the first interlayer insulating layer, and forming an air gap between an upper surface of the contact plug and a lower surface of the second interlayer insulating layer inside the trench.

A method for fabricating a semiconductor device includes forming a first interlayer insulating layer including a trench on a substrate, forming a contact plug inside the trench, forming a first wiring pattern on the contact plug, forming a second interlayer insulating layer surrounding side walls of the first wiring pattern on the first interlayer insulating layer, and forming an air gap between an upper surface of the contact plug and a lower surface of the second interlayer insulating layer inside the trench.