B82Y99/00

TRANSPARENT CONDUCTIVE DOOR FOR A MICROWAVE OVEN AND METHODS OF MAKING THE SAME

A door (100) for a microwave oven (200) is provided that includes: a door frame (102); a substantially transparent, glass or polymeric substrate (10) arranged within the frame (102) to define a viewing window (50); and an electrically conductive mesh (90) spanning the viewing window (50). Further, the mesh (90) comprises a plurality of carbon nanotubes and is embedded in the substrate (10) to shield the microwave radiation generated in the oven (200) from reaching an exterior of the door frame (102).

TRANSPARENT CONDUCTIVE DOOR FOR A MICROWAVE OVEN AND METHODS OF MAKING THE SAME

A door (100) for a microwave oven (200) is provided that includes: a door frame (102); a substantially transparent, glass or polymeric substrate (10) arranged within the frame (102) to define a viewing window (50); and an electrically conductive mesh (90) spanning the viewing window (50). Further, the mesh (90) comprises a plurality of carbon nanotubes and is embedded in the substrate (10) to shield the microwave radiation generated in the oven (200) from reaching an exterior of the door frame (102).

ELECTRONIC COMPONENTS COATED WITH A TOPOLOGICAL INSULATOR
20190150289 · 2019-05-16 ·

A method for increasing a service lifetime of an electronic component includes applying a topological insulator coating layer on a surface of the electronic component and performing a test on the electronic component with the topological insulator coating layer applied thereto. The electronic component with the topological insulator coating layer exhibits at least a 100% improvement during the test when compared to an otherwise equivalent electronic component without the topological insulator layer applied thereto. The electronic component with the topological insulator coating layer exhibits at least a 100% improvement during the test when compared to an otherwise equivalent electronic component with a graphene layer applied thereto. The test includes at least one of: a waterproofness test, an acetic acid test, a sugar solution test, and a methyl alcohol test.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

A device includes a substrate, a stacked structure and a first gate stack. The stacked structure includes a plurality of first semiconductor layers and a plurality of second semiconductor layers alternately stacked over the substrate. One of the first semiconductor layers has a height greater than a height of one the second semiconductor layers. The first gate stack wraps around the stacked structure.

Method for the production of MSnx nanoparticles as anode materials for a rechargeable battery

A method for the production of MSn.sub.x nanoparticles, wherein M is an element selected from the group consisting of Co, Mn, Fe, Ni, Cu, In, Al, Ge, Pb, Bi, Ga, and 0<x10, the method including synthesizing Sn nanoparticles by reducing a tin salt with a solution of a hydride in an anhydrous polar solvent, separating the solid Sn nanoparticles formed from the solution, and washing the Sn nanoparticles, synthesizing M nanoparticles by reducing a metal salt with a solution of a hydride in an anhydrous polar solvent, separating the solid M nanoparticles formed from the solution, and washing the M nanoparticles, mechanical mixing the Sn nanoparticles and the M nanoparticles to convert them into MSn.sub.x nanoparticles.

Method for the production of MSnx nanoparticles as anode materials for a rechargeable battery

A method for the production of MSn.sub.x nanoparticles, wherein M is an element selected from the group consisting of Co, Mn, Fe, Ni, Cu, In, Al, Ge, Pb, Bi, Ga, and 0<x10, the method including synthesizing Sn nanoparticles by reducing a tin salt with a solution of a hydride in an anhydrous polar solvent, separating the solid Sn nanoparticles formed from the solution, and washing the Sn nanoparticles, synthesizing M nanoparticles by reducing a metal salt with a solution of a hydride in an anhydrous polar solvent, separating the solid M nanoparticles formed from the solution, and washing the M nanoparticles, mechanical mixing the Sn nanoparticles and the M nanoparticles to convert them into MSn.sub.x nanoparticles.

SEMICONDUCTOR POWER DEVICE
20190103482 · 2019-04-04 ·

A semiconductor power device includes a substrate, a buffer structure formed on the substrate, a barrier structure formed on the buffer structure, a channel layer formed on the barrier structure, and a barrier layer formed on the channel layer. The barrier structure includes a first functional layer on the buffer structure, a first back-barrier layer on the first functional layer, and an interlayer between the first back-barrier layer and the first functional layer. A material of the first back-barrier layer comprises Al.sub.x1Ga.sub.1-x1N, a material of the first functional layer comprises Al.sub.x2Ga.sub.1-x2N, 0<x1?1, 0?x2?1, and x1?x2. The interlayer includes a carbon doped or an iron doped material.

Incorporating metals, metal oxides and compounds on the inner and outer surfaces of nanotubes and between the walls of the nanotubes and preparation thereof

A multi-walled titanium-based nanotube array containing metal or non-metal dopants is formed, in which the dopants are in the form of ions, compounds, clusters and particles located on at least one of a surface, inter-wall space and core of the nanotube. The structure can include multiple dopants, in the form of metal or non-metal ions, compounds, clusters or particles. The dopants can be located on one or more of on the surface of the nanotube, the inter-wall space (interlayer) of the nanotube and the core of the nanotube. The nanotubes may be formed by providing a titanium precursor, converting the titanium precursor into titanium-based layered materials to form titanium-based nanosheets, and transforming the titanium-based nanosheets to multi-walled titanium-based nanotubes.

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a substrate, an isolation structure, an outer structure, and a gate structure. The isolation structure is disposed on the substrate. The outer structure surrounds a sidewall of the isolation structure. The gate structure surrounds a central part of the outer structure, so that the central part covered by the gate structure becomes a channel region, and the outer structure at both sides of the central part respectively becomes a source region and a drain region.

REDUNDANT POLYMER ANALYSIS BY TRANSLOCATION REVERSALS
20190033286 · 2019-01-31 · ·

The invention is directed to methods for carrying out redundant measurements on polymers by reversing translocation of the polymers through nanopores that each have a detection region, thereby permitting signals generated from the same polymer structure at different times to be collected. Such repeated measurements are combined in order to reduce noise in a final determination of the polymer structure. In some embodiments, polynucleotides whose different nucleotides have distinguishable fluorescent labels attached are repeatedly translocated through nanopores of a nanopore array to compile repeated measurements of optical signals from the same segments, which may be combined to make a determination of a nucleotide sequence.