C30B25/00

Method for growing parallel elongate elements (nanowires, microwires) from a substrate comprising, for each elongate element, a seed formed in a cavity of a nucleation layer or a nucleation pad

The method for growing an elongate element (5), notably a wire of nanowire or microwire type, includes forming a nucleation surface (3) having at least one germination site adopting the form of a germination hollow (7) and delimited at least partly by a mask (2), the at least one germination hollow (7) being situated at a distance from the mask (2), performing nucleation of a seed (4) intended to participate in the growth of the elongate element (5) on the at least one germination hollow (7), and growing the elongate element (5) from the seed (4).

Gallium nitride substrate and manufacturing method of nitride semiconductor crystal

The main purpose of the present invention is to provide: a nonpolar or semipolar GaN substrate, in which a nitride semiconductor crystal having a low stacking fault density can be epitaxially grown on the main surface of the substrate, and a technique required for the production of the substrate. This invention provides: a method for manufacturing an M-plane GaN substrate comprising; forming a mask pattern having a line-shaped opening parallel to an a-axis of a C-plane GaN substrate on an N-polar plane of the C-plane GaN substrate, growing a plane-shape GaN crystal of which thickness direction is an m-axis direction from the opening of the mask pattern by an ammonotharmal method, and cutting out the M-plane GaN substrate from the plane-shape GaN crystal.

Gallium nitride substrate and manufacturing method of nitride semiconductor crystal

The main purpose of the present invention is to provide: a nonpolar or semipolar GaN substrate, in which a nitride semiconductor crystal having a low stacking fault density can be epitaxially grown on the main surface of the substrate, and a technique required for the production of the substrate. This invention provides: a method for manufacturing an M-plane GaN substrate comprising; forming a mask pattern having a line-shaped opening parallel to an a-axis of a C-plane GaN substrate on an N-polar plane of the C-plane GaN substrate, growing a plane-shape GaN crystal of which thickness direction is an m-axis direction from the opening of the mask pattern by an ammonotharmal method, and cutting out the M-plane GaN substrate from the plane-shape GaN crystal.

Method for manufacturing a power semiconductor device having a reduced oxygen concentration

A method for forming a power semiconductor device is provided. The method includes: providing a semiconductor wafer grown by a Czochralski process and having a first side; forming an n-type substrate doping layer in the semiconductor wafer at the first side, the substrate doping layer having a doping concentration of at least 10.sup.17/cm.sup.3; and forming an epitaxy layer on the first side of the semiconductor wafer after forming the n-type substrate doping layer.

Method for manufacturing a power semiconductor device having a reduced oxygen concentration

A method for forming a power semiconductor device is provided. The method includes: providing a semiconductor wafer grown by a Czochralski process and having a first side; forming an n-type substrate doping layer in the semiconductor wafer at the first side, the substrate doping layer having a doping concentration of at least 10.sup.17/cm.sup.3; and forming an epitaxy layer on the first side of the semiconductor wafer after forming the n-type substrate doping layer.

SiC MEMBER
20200231448 · 2020-07-23 · ·

A technology for securing favorable appearance of a SiC member, the SiC member includes: a first SiC layer having a first upper surface having a concavo-convex shape and a first lower surface; and a second SiC layer having a second upper surface and a second lower surface, the second lower surface being in contact with the first upper surface and having a concavo-convex shape corresponding to that of the first upper surface. The second SiC layer has a recess concaved from the second upper surface toward the second lower surface side and a flat bottom surface, and the bottom surface of the recess is placed upward of the second lower surface.

CRYSTAL LAMINATE, SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Provided is a crystal laminate including: a crystal substrate formed from a monocrystal of group III nitride expressed by a compositional formula In.sub.xAl.sub.yGa.sub.1-x-yN (where 0x1, 0y1, 0x+y1), the crystal substrate containing at least any one of n-type impurity selected from the group consisting of Si, Ge, and O; and a crystal layer formed by a group III nitride crystal epitaxially grown on a main surface of the crystal substrate, at least any one of p-type impurity selected from the group consisting of C, Mg, Fe, Be, Zn, V, and Sb being ion-implanted in the crystal layer. The crystal laminate is configured in a manner such that an absorption coefficient of the crystal substrate for light with a wavelength of 2000 nm when the crystal substrate is irradiated with the light falls within a range of 1.8 cm.sup.1 or more and 4.6 cm.sup.1 or less under a temperature condition of normal temperature.

Sample stage/holder for improved thermal and gas flow control at elevated growth temperatures

Apparatuses and methods are provided for manufacturing diamond electronic devices. The apparatus includes a base comprising a water-block and a cover that at least partially covers the water-block. The apparatus includes a sample stage disposed on the base. The apparatus further includes a sample holder disposed on the sample stage and configured to accept a diamond substrate. The apparatus includes controlled thermal interfaces between water-block, sample stage, sample holder and diamond substrate.

EPITAXIAL GROWTH SUBSTRATE, METHOD OF MANUFACTURING EPITAXIAL GROWTH SUBSTRATE, EPITAXIAL SUBSTRATE, AND SEMICONDUCTOR DEVICE
20200211841 · 2020-07-02 · ·

An epitaxial growth substrate on an embodiment includes a non-oriented base material and a buffer layer including a metal chalcogenide on the base material. The metal chalcogenide has uniform crystal orientation on a surface of the buffer layer opposite to the base material side. The buffer layer has a thickness of at least 1.0 m.

Coated cutting tool
10695841 · 2020-06-30 · ·

A coated cutting tool comprising a substrate and a coating layer formed on a surface of the substrate, the coating layer including at least one -type aluminum oxide layer, wherein: in the -type aluminum oxide layer, a texture coefficient TC (0,0,12) of a (0,0,12) plane falls within a predetermined range; a residual stress value in a (1,1,6) plane of the -type aluminum oxide layer falls, at least in part thereof, within a predetermined range; and a residual stress value in a (4,0,10) plane of the -type aluminum oxide layer falls, at least in part thereof, within a predetermined range.