A method for maintaining a contact of a connection jig for connecting between a target object to be subjected to an electrical test and a testing apparatus configured to conduct the electrical test on the target object includes: detecting a change in voltage upon supply of power for the electrical test to a test point on the target object through the contact; and issuing maintenance information indicating the contact is abnormal, upon detection of a portion where the voltage does not successively rise.

A method for maintaining a contact of a connection jig for connecting between a target object to be subjected to an electrical test and a testing apparatus configured to conduct the electrical test on the target object includes: detecting a change in voltage upon supply of power for the electrical test to a test point on the target object through the contact; and issuing maintenance information indicating the contact is abnormal, upon detection of a portion where the voltage does not successively rise.

The method for forming a semiconductor probe tip comprises depositing a first copper layer onto exposed electrically conductive areas of a wafer. The first copper layer surrounds a non-conductive polymer structure on the wafer. The non-conductive polymer structure is removed to form a primary cavity in the first copper layer. The wafer and the primary cavity are coated with a polymer layer. Regions of the polymer layer are removed to form a secondary cavity within and alongside the primary cavity. A metal layer is deposited on exposed electrically conductive areas of the wafer and within bounds of the secondary cavity.

Electrical properties of a semiconductor device are reproducibly and stably measured in a testing step of the semiconductor device. A probe pin includes a first plunger, a second plunger, a cleaning shaft, a first coil spring, and a second coil spring. The cleaning shaft accommodated in the inside of the first plunger is allowed to enter and exit through a tip of a contact of the first plunger by the second coil spring, thereby solder shavings attached to the tip of the contact are removed. The first plunger is electrically coupled to the second plunger by the first coil spring wound on an outer side face of the first plunger and on an outer side face of the second plunger.

Electrical properties of a semiconductor device are reproducibly and stably measured in a testing step of the semiconductor device. A probe pin includes a first plunger, a second plunger, a cleaning shaft, a first coil spring, and a second coil spring. The cleaning shaft accommodated in the inside of the first plunger is allowed to enter and exit through a tip of a contact of the first plunger by the second coil spring, thereby solder shavings attached to the tip of the contact are removed. The first plunger is electrically coupled to the second plunger by the first coil spring wound on an outer side face of the first plunger and on an outer side face of the second plunger.

There is provided a probe card in contact with pads formed on a plurality of semiconductor dies on a wafer to test the semiconductor dies. The probe card includes a printed circuit board on which a plurality of pads are formed; a block plate having a plurality of grooves and attached to the printed circuit board; a plurality of sub-probe units equipped with a plurality of probe tips in contact with the pads of the semiconductor dies and detachably coupled to the plurality of grooves; and a plurality of interposer/space transformer units interposed between the sub-probe units and the printed circuit board and configured to electrically connect the probe tips to the pads of the printed circuit board and transform a pitch of the pads formed on the printed circuit to a pitch of the plurality of probe tips.

There is provided a probe card in contact with pads formed on a plurality of semiconductor dies on a wafer to test the semiconductor dies. The probe card includes a printed circuit board on which a plurality of pads are formed; a block plate having a plurality of grooves and attached to the printed circuit board; a plurality of sub-probe units equipped with a plurality of probe tips in contact with the pads of the semiconductor dies and detachably coupled to the plurality of grooves; and a plurality of interposer/space transformer units interposed between the sub-probe units and the printed circuit board and configured to electrically connect the probe tips to the pads of the printed circuit board and transform a pitch of the pads formed on the printed circuit to a pitch of the plurality of probe tips.

High-efficiency, ultra-low power gas sensors are provided. In one aspect, a gas detector device is provided which includes: at least one gas sensor having a plurality of fins; a conformal resistive heating element on the fins; a conformal barrier layer on the resistive heating element; and a conformal sensing layer on the barrier layer. A method of forming a gas sensor as well as a method for use thereof in gas detection are also provided.

High-efficiency, ultra-low power gas sensors are provided. In one aspect, a gas detector device is provided which includes: at least one gas sensor having a plurality of fins; a conformal resistive heating element on the fins; a conformal barrier layer on the resistive heating element; and a conformal sensing layer on the barrier layer. A method of forming a gas sensor as well as a method for use thereof in gas detection are also provided.

A magnetoresistive sensor contains a bridge circuit having at least one magnetoresistive resistor, wherein the bridge circuit is configured to provide a first differential analog output voltage. The magnetoresistive sensor also contains an amplifier circuit connected downstream of the bridge circuit, wherein the amplifier circuit is configured to provide a second differential analog output voltage based on the first differential analog output voltage provided by the bridge circuit. The second differential analog output voltage has a value of zero at a specified magnetic field strength not equal to zero. A common-mode voltage associated with the second differential analog output voltage corresponds to a specified percentage of a supply voltage of the bridge circuit.