A sensor system with performance compensation testing capability includes a sensor device, a resistance bridge, a signal conditioning circuit, a first test connector, and a second test connector. The resistance bridge circuit is disposed on the sensor device and includes an excitation terminal, a circuit common terminal, and two output terminals, and is configured, upon being energized, to supply a bridge output voltage across the two output terminals. The signal conditioning circuit is electrically coupled to the excitation terminal, the circuit common terminal, and the two output terminals, and is configured to supply a sensor output signal representative of bridge output voltage. The first test connector is electrically coupled to one of the two output terminals and is configured to be coupled to an impedance test device. The second test connector is electrically coupled to the circuit common terminal and is configured to be coupled to the impedance test device.

A probe head includes a first guiding board, a second guiding board, a spacer, a positioning assembly and probes. The second guiding board is stacked over the first guiding board, in which an accommodating space is formed between the first guiding board and the second guiding board. The spacer is disposed on the second guiding board and is located in the accommodating space. The positioning assembly is disposed aid supported on the second guiding board and is movably retained between the spacer and the first guiding board, and the positioning assembly includes a supporting frame and a film. The supporting frame includes at least one rib portion. The film is fixed to the supporting frame. The probes pass through the first guiding board, the second guiding board, and the film.

The test system provides an array of test probes. The probes pass through a first or upper probe guide retainer which has a plurality of slot sized to receive the probes in a way that they cannot rotate. A plurality of flex circuits at the different heights engage bottom probe ends at their respective height levels and flex circuits continue the electrical connection from the probes to a load board. The test probes are bonded to the flex circuits by ring shaped flowable conductive material. The flex circuits are biased against a load board by an elastomeric pad of spaced part conical projections.

A test socket for integrated circuit (IC) testing is provided and comprises an insulating support structure and multiple conductive columns. The insulating support structure features multiple through-holes designed to accommodate the conductive columns. Parts of the conductive columns are embedded within the insulating support structure and extend through these through-holes to establish electrical connections for IC testing. The conductive columns are elastic, allowing them to accommodate variations caused by warpage of the IC packaging and the tolerances in BGA solder ball sizes. Additionally, the insulating support structure incorporates multiple grooves located next to the through-holes, where parts of the conductive columns are embedded, enhancing the fixation strength of the conductive columns to the insulating support structure. Furthermore, the test socket includes anti-short-circuit brackets positioned beside the conductive columns to prevent them from contacting each other and causing short circuits. The invention also provides a method for manufacturing this test socket.

A test socket for integrated circuit (IC) testing is provided and comprises an insulating support structure and multiple conductive columns. The insulating support structure features multiple through-holes designed to accommodate the conductive columns. Parts of the conductive columns are embedded within the insulating support structure and extend through these through-holes to establish electrical connections for IC testing. The conductive columns are elastic, allowing them to accommodate variations caused by warpage of the IC packaging and the tolerances in BGA solder ball sizes. Additionally, the insulating support structure incorporates multiple grooves located next to the through-holes, where parts of the conductive columns are embedded, enhancing the fixation strength of the conductive columns to the insulating support structure. Furthermore, the test socket includes anti-short-circuit brackets positioned beside the conductive columns to prevent them from contacting each other and causing short circuits. The invention also provides a method for manufacturing this test socket.

The invention relates to a method for manufacturing an electric current sensor (SHE) comprising the following steps: a) providing a metal or metal alloy substrate (SBT), b) making a non-through cavity (CVT) in said substrate so that said cavity separates the substrate into two areas (Z1, Z2), c) producing a resistive element (ER) in said cavity (CVT) by additive manufacturing, d) annealing the resulting assembly, e) removing a part of the substrate (SBT) to leave only the resistive element (ER) between the two areas (Z1, Z2) of the substrate, and f) defining, within each area (Z1, Z2), a connection terminal (BCE1, BCE2) to obtain electrodes (PEL, DEL).

A test device for testing a substrate is provided. The device comprises: a mounting table for test on which the substrate under test is mounted; a transportation mechanism to transport the substrate under test; a mounting table for polishing on which a polishing substrate is mounted; a first forward or backward movement mechanism to move the mounting table for test with respect to a probe; and a second forward or backward movement mechanism to move the mounting table for polishing with respect to the probe, wherein the mounting table for polishing is provided separately from the mounting table for test, a retreat region of the mounting table for test is opposite to a retreat region of the mounting table for polishing, and the second forward or backward movement mechanism is configured such that a portion of the polishing substrate overlaps the probe while the other portion of the polishing substrate does not overlap the probe.

A test device for testing a substrate is provided. The device comprises: a mounting table for test on which the substrate under test is mounted; a transportation mechanism to transport the substrate under test; a mounting table for polishing on which a polishing substrate is mounted; a first forward or backward movement mechanism to move the mounting table for test with respect to a probe; and a second forward or backward movement mechanism to move the mounting table for polishing with respect to the probe, wherein the mounting table for polishing is provided separately from the mounting table for test, a retreat region of the mounting table for test is opposite to a retreat region of the mounting table for polishing, and the second forward or backward movement mechanism is configured such that a portion of the polishing substrate overlaps the probe while the other portion of the polishing substrate does not overlap the probe.

A probe card for a circuit probe test system and methods of fabrication thereof. The probe card includes a substrate portion, a guide plate having a plurality of openings, and a plurality of probe pins extending through the openings, including at least one first probe pin configured to carry power between the substrate portion and a device-under-test (DUT), at least one second probe pin configured to electrically couple the DUT to ground, and at least two third probe pins configured to carry loopback test signals between contact regions on the DUT. A low dielectric constant (low-k) material may be located between the third probe pins and the guide plate. The low-k material may prevent direct contact between the third probe pins and the relatively higher dielectric-constant material of the guide plate, which may improve the signal integrity (SI) of the loopback test signals.

A probe card for a circuit probe test system and methods of fabrication thereof. The probe card includes a substrate portion, a guide plate having a plurality of openings, and a plurality of probe pins extending through the openings, including at least one first probe pin configured to carry power between the substrate portion and a device-under-test (DUT), at least one second probe pin configured to electrically couple the DUT to ground, and at least two third probe pins configured to carry loopback test signals between contact regions on the DUT. A low dielectric constant (low-k) material may be located between the third probe pins and the guide plate. The low-k material may prevent direct contact between the third probe pins and the relatively higher dielectric-constant material of the guide plate, which may improve the signal integrity (SI) of the loopback test signals.