A transmission line arrangement having a first end and a second end, the transmission line arrangement being configured to transmit a signal between the first end and the second end, the transmission line arrangement comprising a signal conductor extending between the first end and the second end of the transmission line arrangement, a first conducting sheet and a second conducting sheet positioned on two opposing sides of the signal conductor, an insulating material separating the first and second conducting sheets from the signal conductor and a plurality of pieces of conducting material extending between the first and second conducting sheets and arranged at different positions between the first and second ends of the transmission line arrangement, wherein the pieces of conducting material and the conducting sheets are arranged to substantially surround the signal conductor for at least part of its length between the first and second ends of the transmission line arrangement.

An active probe adapter adapts an active probe to a PXI instrumentation module. The active probe adapter includes a first module interface (MI) connector on a first side of the active probe adapter. The first MI connector is configured to connect to a corresponding interface connector of the PXI instrumentation module. The active probe adapter further includes a plurality of probe pads on a second side of the active probe adapter opposite to the first side. The plurality of probe pads is configured to interface with an active probe employed with the PXI instrumentation module. The active probe adapter may include a second MI connector on the active probe first side configured to connect to a PXI power module and provide power to the active probe.

Aspects of the disclosed technology relate to techniques of test pattern generation based on the cell transition fault model. An assignment for two consecutive clock cycles at inputs of a complex cell in a circuit design is determined based on a gate-level representation of the circuit design. The assignment includes a first transition at one of the inputs which is sensitized by remaining part of the assignment to cause a second transition at an output of the complex cell. A test pattern that generates the assignment at the inputs and propagates a value at the output corresponding to the second clock cycle of the two consecutive clock cycles from the output to an observation point is then derived based on the gate-level representation.

The invention concerns a manufacturing method for an electrical resistor (1), in particular for a low-resistance current measuring resistor, with the following steps (S1-S4): a) providing a plate-shaped base part (9) for the resistor (1), the base part (9) having a certain thickness and corresponding to the thickness a certain value of an electrical component characteristic (R), the thickness-dependent electrical component characteristic (R) preferably being the electrical resistance (1) of the base part (9), the sheet resistance or the transverse resistance, and b) rolling the base part (9) with a certain degree of rolling (AG), the thickness of the base part (9) decreasing in accordance with the degree of rolling (AG) and the value of the component characteristic (R) changing accordingly, c) measuring the thickness-dependent electrical component characteristic (R) on the rolled base part (9), and d) adaptation of the degree of rolling (AG) as a function of the measured electrical component characteristic (R), in particular in the context of a closed-loop control system with the electrical component characteristic (R) as controlled variable and the degree of rolling (AG) as control variable.

Furthermore, the invention includes an appropriately manufactured resistor and a corresponding production plant.

The invention concerns a manufacturing method for an electrical resistor (1), in particular for a low-resistance current measuring resistor, with the following steps (S1-S4): a) providing a plate-shaped base part (9) for the resistor (1), the base part (9) having a certain thickness and corresponding to the thickness a certain value of an electrical component characteristic (R), the thickness-dependent electrical component characteristic (R) preferably being the electrical resistance (1) of the base part (9), the sheet resistance or the transverse resistance, and b) rolling the base part (9) with a certain degree of rolling (AG), the thickness of the base part (9) decreasing in accordance with the degree of rolling (AG) and the value of the component characteristic (R) changing accordingly, c) measuring the thickness-dependent electrical component characteristic (R) on the rolled base part (9), and d) adaptation of the degree of rolling (AG) as a function of the measured electrical component characteristic (R), in particular in the context of a closed-loop control system with the electrical component characteristic (R) as controlled variable and the degree of rolling (AG) as control variable.

Furthermore, the invention includes an appropriately manufactured resistor and a corresponding production plant.

An exemplary apparatus includes a testing module connected to, and providing a test voltage to, an integrated circuit containing devices under test. The testing module performs a time-dependent dielectric breakdown (TDDB) test on the devices under test. A decoder is connected to the devices under test and the testing module. The decoder selectively connects each device being tested to the testing module. Efuses are connected to a different one of the devices under test. The efuses separately electrically disconnect each of the devices under test from the test voltage upon failure of a corresponding device under test. Protection circuits are connected between the efuses and a ground voltage. Each protection circuit provides a shunt around the decoder upon failure of the device under test.

An exemplary apparatus includes a testing module connected to, and providing a test voltage to, an integrated circuit containing devices under test. The testing module performs a time-dependent dielectric breakdown (TDDB) test on the devices under test. A decoder is connected to the devices under test and the testing module. The decoder selectively connects each device being tested to the testing module. Efuses are connected to a different one of the devices under test. The efuses separately electrically disconnect each of the devices under test from the test voltage upon failure of a corresponding device under test. Protection circuits are connected between the efuses and a ground voltage. Each protection circuit provides a shunt around the decoder upon failure of the device under test.

A probe position inspection apparatus capable of inspecting the position of contact portions of respective probe tips easily and accurately, an apparatus for inspecting a semiconductor device, and a method of inspecting a semiconductor device are provided. The probe position inspection apparatus includes a transparent plate, a camera for taking an image of one surface of the transparent plate, and a pressure passive member covering the other surface of the transparent plate. The tip of a probe for use in evaluation of a semiconductor device is pressed against the other surface of the transparent plate, with the pressure passive member therebetween. The probe position inspection apparatus further includes an image processor for processing the image taken by the camera to detect the position of the probe in the plane of the transparent plate.

A probe position inspection apparatus capable of inspecting the position of contact portions of respective probe tips easily and accurately, an apparatus for inspecting a semiconductor device, and a method of inspecting a semiconductor device are provided. The probe position inspection apparatus includes a transparent plate, a camera for taking an image of one surface of the transparent plate, and a pressure passive member covering the other surface of the transparent plate. The tip of a probe for use in evaluation of a semiconductor device is pressed against the other surface of the transparent plate, with the pressure passive member therebetween. The probe position inspection apparatus further includes an image processor for processing the image taken by the camera to detect the position of the probe in the plane of the transparent plate.

A testing device for wafer level testing of IC circuits is disclosed. An upper and lower pin (22, 62) are configured to slide relatively to each other and are held in electrically biased contact by an elastomer (80). To prevent rotation of the pins in the pin guide, a walled recess in the bottom of the pin guide engages flanges on the pins. In another embodiment, the pin guide maintains rotational alignment by being fitted around the pin profile or having projections abutting the pin. The pin guide (12) is maintained in alignment with the retainer 14 by establishing a registration corner (506) and driving the guide into the corner by elastomers in at least one diagonally opposite corner.