G01R3/00

TEST CIRCUIT, TEST METHOD, ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF
20180284153 · 2018-10-04 · ·

A test circuit, a test method, an array substrate and a manufacturing method thereof are provided. The test circuit includes a plurality of to-be-tested units and plurality of test electrodes connected to the to-be-tested units. The plurality of to-be-tested units are arranged in a matrix. At least one of the test electrodes is multiplexed by the plurality of to-be-tested units in a row direction and at least one of the test electrodes is multiplexed by the plurality of to-be-tested units in a column direction.

Method of using a meter puller
10086504 · 2018-10-02 · ·

A method of using a meter puller for installing and removing an electrical power meter comprising a sleeve member adapted for sliding movement about the meter and having a first end opposite a second end, a latching mechanism for securing the meter puller to the meter, and a shield secured to the second end of the sleeve member. The shield includes two sides, wherein the meter puller is positioned on a first side of the shield. A handle is positioned on an opposite second side of the shield and operatively connected to the latching mechanism.

Method of using a meter puller
10086504 · 2018-10-02 · ·

A method of using a meter puller for installing and removing an electrical power meter comprising a sleeve member adapted for sliding movement about the meter and having a first end opposite a second end, a latching mechanism for securing the meter puller to the meter, and a shield secured to the second end of the sleeve member. The shield includes two sides, wherein the meter puller is positioned on a first side of the shield. A handle is positioned on an opposite second side of the shield and operatively connected to the latching mechanism.

Test assembly and method of manufacturing the same
10088502 · 2018-10-02 · ·

A test assembly adapted to test a semiconductor device is provided. The test assembly includes a main circuit board, a space transformer, an intermediary supporting element, an adhesive element, a plurality of electrical connection elements and a plurality of test probes. The space transformer is disposed on the main circuit board and has a first surface and a second surface opposite to the first surface. The first surface faces the main circuit board. The intermediary supporting element is disposed between the main circuit board and the first surface. The adhesive element is disposed between the intermediary supporting element and the first surface. The space transformer is attached to the intermediary supporting element through the adhesive element. The electrical connection elements are disposed between the main circuit board and the first surface. Each of the electrical connection elements passes through the intermediary supporting element and the adhesive element such that the space transformer is electrically connected to the main circuit board through the electrical connection elements. The test probes are disposed on the second surface and electrically connected to the space transformer.

Test assembly and method of manufacturing the same
10088502 · 2018-10-02 · ·

A test assembly adapted to test a semiconductor device is provided. The test assembly includes a main circuit board, a space transformer, an intermediary supporting element, an adhesive element, a plurality of electrical connection elements and a plurality of test probes. The space transformer is disposed on the main circuit board and has a first surface and a second surface opposite to the first surface. The first surface faces the main circuit board. The intermediary supporting element is disposed between the main circuit board and the first surface. The adhesive element is disposed between the intermediary supporting element and the first surface. The space transformer is attached to the intermediary supporting element through the adhesive element. The electrical connection elements are disposed between the main circuit board and the first surface. Each of the electrical connection elements passes through the intermediary supporting element and the adhesive element such that the space transformer is electrically connected to the main circuit board through the electrical connection elements. The test probes are disposed on the second surface and electrically connected to the space transformer.

Interconnect socket adapter for adapting one or more power sources and power sinks

Interconnection meter socket adapters are provided. An interconnection meter socket adapter comprises a housing enclosing a set of electrical connections. The interconnection meter socket adapter may be configured to be coupled to a standard distribution panel and a standard electric meter, thereby establishing connections between a distribution panel and a user such that electrical power may be delivered to the user while an electrical meter measures the power consumption of the user. A power regulation module is disposed between the interconnection meter socket adapter, and configured to selectively connect one or more energy sources or energy sinks.

Interconnect socket adapter for adapting one or more power sources and power sinks

Interconnection meter socket adapters are provided. An interconnection meter socket adapter comprises a housing enclosing a set of electrical connections. The interconnection meter socket adapter may be configured to be coupled to a standard distribution panel and a standard electric meter, thereby establishing connections between a distribution panel and a user such that electrical power may be delivered to the user while an electrical meter measures the power consumption of the user. A power regulation module is disposed between the interconnection meter socket adapter, and configured to selectively connect one or more energy sources or energy sinks.

Compliant pin probes with extension springs, methods for making, and methods for using
12078657 · 2024-09-03 · ·

Embodiments are directed to probe structures, arrays, methods of using probes and arrays, and/or methods for making probes and/or arrays wherein the probes include at least one flat extension spring segment and wherein in some embodiments the probes also provide: (1) narrowed channel passage segments (e.g. by increasing width of plunger elements or by decreasing channel widths) along portions of channel lengths (e.g. not entire channel lengths) to enhance stability or pointing accuracy while still allowing for assembled formation of movable probe elements, and/or (2) ratcheting elements on probe arms and/or frame elements to allow permanent or semi-permanent transition from a build state or initial state to a working state or pre-biased state.

Compliant pin probes with extension springs, methods for making, and methods for using
12078657 · 2024-09-03 · ·

Embodiments are directed to probe structures, arrays, methods of using probes and arrays, and/or methods for making probes and/or arrays wherein the probes include at least one flat extension spring segment and wherein in some embodiments the probes also provide: (1) narrowed channel passage segments (e.g. by increasing width of plunger elements or by decreasing channel widths) along portions of channel lengths (e.g. not entire channel lengths) to enhance stability or pointing accuracy while still allowing for assembled formation of movable probe elements, and/or (2) ratcheting elements on probe arms and/or frame elements to allow permanent or semi-permanent transition from a build state or initial state to a working state or pre-biased state.

Apparatus for Super-Fine Pitch Integrated Circuit Testing and Methods of Constructing
20180275169 · 2018-09-27 · ·

An apparatus, including methods of construction and use, for super-fine pitch integrated circuit testing is disclosed. The apparatus includes a substrate of one or more redistribution layers (RDLs), a plurality of vertical interconnect access (via) columns, a material that backs the substrate, and another material that protects the plurality of via columns. Semiconductor wafer fabrication processes are used to fabricate the apparatus, effective to enable the apparatus to test one or more IC die having pad pitch spacing of less than 50 um.