A computing apparatus has a logic unit configured to perform an arithmetic operation by relating light beams, each having a respective light amplitude, to obtain a light-based result of the operation, and to evaluate the light-based result to output a corresponding numeric result. The logic unit uses variables values, each corresponding to a respective distinct light amplitude, the variable values thereby corresponding to a plurality of distinct light amplitudes.

Methods and devices are disclosed for implementing quantum information processing based on electron spins in semiconductor and transition metal compositions. The transition metal electron orbitals split under semiconductor crystal field. The electron ground states are used as qubits. The transitions between the ground states involve electron spin flip. The semiconductor and transition metal compositions may be further included in optical cavities to facilitate quantum information processing. Quantum logic operations may be performed using single color or two color coherent resonant optical excitations via an excited electron state.

Methods and devices are disclosed for implementing quantum information processing based on electron spins in semiconductor and transition metal compositions. The transition metal electron orbitals split under semiconductor crystal field. The electron ground states are used as qubits. The transitions between the ground states involve electron spin flip. The semiconductor and transition metal compositions may be further included in optical cavities to facilitate quantum information processing. Quantum logic operations may be performed using single color or two color coherent resonant optical excitations via an excited electron state.

A photonic crystal (PhC) all-optical OR-transformation logic gate, which comprises an optical-switch unit (OSU), a PhC-structure unit, a reference light, a wave-absorbing load (WAL) and a D-type flip-flop (DFF) unit; two system-signal-input ports are respectively connected with a first logic-signal X.sub.1 and a second logic-signal X.sub.2; the reference light is connected with the reference-light-input port of the OSU; three intermediate-signal-output ports are respectively connected with two intermediate-signal-input ports of the PhC-structure unit and the WAL; a clock-signal CP through the input port of a two-branch waveguide are respectively connected with a first clock-signal CP input port of the OSU and a second clock-signal-CP-input port of the DFF unit; the signal-output port of the PhC-structure unit is connected with the D-signal-input port of the DFF unit. The structure of the present invention is compact in structure, strong in anti-interference capability and ease of integration with other optical-logic elements.

A photonic crystal (PhC) all-optical OR-transformation logic gate, which comprises an optical-switch unit (OSU), a PhC-structure unit, a reference light, a wave-absorbing load (WAL) and a D-type flip-flop (DFF) unit; two system-signal-input ports are respectively connected with a first logic-signal X.sub.1 and a second logic-signal X.sub.2; the reference light is connected with the reference-light-input port of the OSU; three intermediate-signal-output ports are respectively connected with two intermediate-signal-input ports of the PhC-structure unit and the WAL; a clock-signal CP through the input port of a two-branch waveguide are respectively connected with a first clock-signal CP input port of the OSU and a second clock-signal-CP-input port of the DFF unit; the signal-output port of the PhC-structure unit is connected with the D-signal-input port of the DFF unit. The structure of the present invention is compact in structure, strong in anti-interference capability and ease of integration with other optical-logic elements.

A media-defined optical logic circuit composed of a set of light-transmitting polyhedral prisms arranged so that a pair of adjacent prisms can exchange photonic signals through adjacent surfaces. Each prism contains one or more quantum dots that, when excited by a photonic signal received from an adjacent prism, respond by emitting light that becomes an incoming photonic signal for an adjacent prism. Photonic signals are propagated through the circuit in this manner along light-guide paths created by shading certain surfaces to render them fully or partially opaque. The prisms and shading are arranged such that the circuit performs a certain logic function. When the circuit receives a set of photonic input signals representing a binary input value, the circuit responds by emitting a set of photonic output signals that represent a binary output value determined by performing the logic function upon the binary input value.

A media-defined optical logic circuit composed of a set of light-transmitting polyhedral prisms arranged so that a pair of adjacent prisms can exchange photonic signals through adjacent surfaces. Each prism contains one or more quantum dots that, when excited by a photonic signal received from an adjacent prism, respond by emitting light that becomes an incoming photonic signal for an adjacent prism. Photonic signals are propagated through the circuit in this manner along light-guide paths created by shading certain surfaces to render them fully or partially opaque. The prisms and shading are arranged such that the circuit performs a certain logic function. When the circuit receives a set of photonic input signals representing a binary input value, the circuit responds by emitting a set of photonic output signals that represent a binary output value determined by performing the logic function upon the binary input value.

A photonic crystal (PhC) all-optical self-OR-transformation logic gate, which comprises an optical-switch unit (OSU), a PhC structure unit, a reference-light source, a memory or delayer and a D-type flip-flop (DFF); an input port of a delayer is connected with a logic-signal X, and an output port of said delayer is connected with the logic-signal-input port of said OSU; a reference light is connected to the reference-light-input port of said OSU; two intermediate-signal-output ports of said OSU are respectively connected with the two intermediate-signal-input port of said PhC-structure unit; a clock-signal CP is connected to the clock-signal-CP-input port of said OSU and the second clock-signal-input port of said DFF; the signal-output port of said PhC-structure unit is connected with the D-signal input port of said DFF. The structure of the present invention is compact in structure, strong in anti-interference capability and ease in integration with other optical-logic elements.

A photonic crystal (PhC) all-optical self-OR-transformation logic gate, which comprises an optical-switch unit (OSU), a PhC structure unit, a reference-light source, a memory or delayer and a D-type flip-flop (DFF); an input port of a delayer is connected with a logic-signal X, and an output port of said delayer is connected with the logic-signal-input port of said OSU; a reference light is connected to the reference-light-input port of said OSU; two intermediate-signal-output ports of said OSU are respectively connected with the two intermediate-signal-input port of said PhC-structure unit; a clock-signal CP is connected to the clock-signal-CP-input port of said OSU and the second clock-signal-input port of said DFF; the signal-output port of said PhC-structure unit is connected with the D-signal input port of said DFF. The structure of the present invention is compact in structure, strong in anti-interference capability and ease in integration with other optical-logic elements.

The ability to efficiently and reliably transmit, route and receive data across telecommunication networks is essential for existing and evolving applications where connectivity to these networks is a ubiquitous aspect of society today. However, limitations in existing telecommunication networks impact this through performance, cost, and speed. To address this the inventor has established improvements with respect to routing (switching), processing, and monitoring. For routing low latency switch architectures for improving packet-based data switching are described. For processing digital optical logic devices and digital optical processing structures for enhanced functionality and processing within optical telecommunication networks are described. For monitoring improved optical connectors which provide embedded monitoring and analytical functionality for improved management of optical telecommunication networks are described.