A semiconductor device capable of reducing electric power consumption while suppressing deterioration in reliability is provided. The semiconductor device includes a flash memory, a SRAM formed on a SOI substrate, oscillation circuits generating a signal of a first frequency and a signal of a second frequency lower than the first frequency, and a processor operating in synchronization with a system clock. The processor performs steps of turning on a power supply of the flash memory, lowering a threshold voltage of the SRAM, transferring a program from the flash memory to the SRAM by using the signal of the first frequency as the system clock, turning off the power supply of the flash memory, heightening the threshold voltage of the SRAM, and executing the program stored in the SRAM by using the signal of the second frequency as the system clock.

A semiconductor device capable of reducing electric power consumption while suppressing deterioration in reliability is provided. The semiconductor device includes a flash memory, a SRAM formed on a SOI substrate, oscillation circuits generating a signal of a first frequency and a signal of a second frequency lower than the first frequency, and a processor operating in synchronization with a system clock. The processor performs steps of turning on a power supply of the flash memory, lowering a threshold voltage of the SRAM, transferring a program from the flash memory to the SRAM by using the signal of the first frequency as the system clock, turning off the power supply of the flash memory, heightening the threshold voltage of the SRAM, and executing the program stored in the SRAM by using the signal of the second frequency as the system clock.

A two-way adaptive clock circuit supporting a wide frequency range is composed of a phase clock generating module, a phase clock selecting module, an adaptive clock stretching or compressing amount regulating circuit module and a control module. The adaptive clock stretching or compressing amount regulating circuit module can monitor delay information of a critical path in a chip in real time and feed the information back into the control module. After receiving a clock stretching or compressing enable signal and a stretching or compressing scale signal, the control module selects a target phase clock from clocks generated by the phase clock generating module to rapidly regulate an adaptive clock in a current cycle. The present invention is applied to an adaptive voltage frequency regulating circuit based on on-line time sequence monitoring.

A two-way adaptive clock circuit supporting a wide frequency range is composed of a phase clock generating module, a phase clock selecting module, an adaptive clock stretching or compressing amount regulating circuit module and a control module. The adaptive clock stretching or compressing amount regulating circuit module can monitor delay information of a critical path in a chip in real time and feed the information back into the control module. After receiving a clock stretching or compressing enable signal and a stretching or compressing scale signal, the control module selects a target phase clock from clocks generated by the phase clock generating module to rapidly regulate an adaptive clock in a current cycle. The present invention is applied to an adaptive voltage frequency regulating circuit based on on-line time sequence monitoring.

An oscillation circuit has a voltage generator configured to generate a linearly changing voltage, a voltage level of which linearly changes as time passes, a first comparator configured to compare the linearly changing voltage with a first reference voltage, a second comparator configured to compare the linearly changing voltage with a second reference voltage having a higher voltage level than the first reference voltage, a time-to-digital converter configured to output a bit sequence signal in accordance with a time difference between a time when the first comparator detects that the linearly changing voltage matches the first reference voltage and a time when the second comparator detects that the linearly changing voltage matches the second reference voltage, and an oscillator configured to generate an oscillation signal that oscillates at a frequency according to the bit sequence signal.

An oscillator includes a resonator, a clock signal generation circuit, a clock signal output terminal, an external signal input terminal, an interface circuit, and an interface terminal. The clock signal generation circuit oscillates the resonator to generate a clock signal. The clock signal output terminal outputs the clock signal. An external signal is input to the external signal input terminal. The interface circuit outputs time difference information obtained by measuring a time difference between a transition timing of a first signal based on the external signal input from the external signal input terminal and a transition timing of a second signal based on the clock signal, or frequency information obtained by measuring a frequency of a first clock signal, which is one of the clock signal and the external clock signal, based on a frequency of a second clock signal, which is the other of the clock signal and the external clock signal. The interface terminal is coupled to the interface circuit.

An electronic timepiece includes an indicating hand, a distance display hand, a GPS receiver that receives satellite signals transmitted from GPS satellites, a magnetic sensor, and a controller. The controller determines the direction to a destination on the basis of the satellite signals received by the GPS receiver, the output from the magnetic sensor, and destination information representing the position of the destination, determines the distance to the destination on the basis of the satellite signals and the destination information, causes the indicating hand to indicate the direction to the destination, and causes the distance display hand to display the distance to the destination.

An electronic timepiece includes an indicating hand, a distance display hand, a GPS receiver that receives satellite signals transmitted from GPS satellites, a magnetic sensor, and a controller. The controller determines the direction to a destination on the basis of the satellite signals received by the GPS receiver, the output from the magnetic sensor, and destination information representing the position of the destination, determines the distance to the destination on the basis of the satellite signals and the destination information, causes the indicating hand to indicate the direction to the destination, and causes the distance display hand to display the distance to the destination.

An oscillation circuit has a voltage generator configured to generate a linearly changing voltage, a voltage level of which linearly changes as time passes, a first comparator configured to compare the linearly changing voltage with a first reference voltage, a second comparator configured to compare the linearly changing voltage with a second reference voltage having a higher voltage level than the first reference voltage, a time-to-digital converter configured to output a bit sequence signal in accordance with a time difference between a time when the first comparator detects that the linearly changing voltage matches the first reference voltage and a time when the second comparator detects that the linearly changing voltage matches the second reference voltage, and an oscillator configured to generate an oscillation signal that oscillates at a frequency according to the bit sequence signal.

A wearable device or a smart watch with a control mechanism that allows efficient user interaction by a combination of means including a control-ring subsystem, with visual and haptic feedback subsystems.