Patent classifications
G06F1/00
Techniques for monitoring power device alarms
Techniques and apparatus for providing power monitoring processes are described. In one embodiment, for example, an apparatus may include at least one storage device and logic coupled to the at least one storage device. The logic may be configured to poll a power device comprising a plurality of power elements via an alarm status identifier operative to cause the power device to return an alarm status string comprising a plurality of alarm status bits, each of the plurality of alarm status bits indicating an active alarm state of one of the plurality of power elements, and determine each of the plurality of power elements in the active alarm state based on the alarm status string. Other embodiments are described.
Power management of mobile clients using location-based services
In one embodiment, a mobile client system may determine its location. The mobile client system may store the location in a location history in a memory of the mobile client system, where the location history comprises one or more geographic locations and one or more time stamps corresponding to each of the geographic locations. The mobile client system may detect its current status based at least in part on whether the mobile client system is stationary. The mobile client system may send the location history to a location server of an online social network based at least in part on the current status of the mobile client system and a power requirement for sending the location history to the location server.
LATCHING SYSTEM
In one example a latching system is disclosed. The latching system has a handle that moves along an axis of motion between three positions: a latched position, an unlatched position and an engaged position. The handle moves a retention clip from a locked position into an unlocked position when the handle moves from the unlatched position into the engaged position.
Multiple field programmable gate array (FPGA) based multi-legged order transaction processing system and method thereof
Conventionally, for processing multi-legged orders, matching engines were implemented in software and were connected through Ethernet which is very slow in terms of throughput. Such traditional trading systems failed to process orders of tokens on different machines and these were summarily rejected. Present disclosure provides multiple FPGA system being optimized for processing/executing multi-legged orders. The system includes a plurality of FPGAs which are interconnected for communication via a PCIe port of a multi-port PCIe switch. Each FPGA comprise a net processing layer, a matcher, and a look-up table. Each FPGA is configured to process tokens (e.g., securities, etc.). If orders to be processed are for tokens on same FPGA where the order is received, then tokens are processed locally. Else net processing layer of a specific FPGA routes to specific order request to another FPGA where the tokens (securities) are located thereby reducing the latency and improving overall throughput.
Display apparatus
A display apparatus includes a flexible circuit board including a plurality of first substrate pads and a plurality of second substrate pads, a main circuit board connected to the flexible circuit board, and a display panel including a plurality of first display pads and a plurality of second display pads, where the plurality of first display pads is connected to the main circuit board through the flexible circuit board and each of the plurality of first display pads at least partially overlaps corresponding substrate pad of the plurality of first substrate pads, respectively, and each of the plurality of second display pads at least partially overlaps corresponding substrate pad of the plurality of second substrate pads, respectively.
Data processing system and method for monitoring system properties
A data processing system and method are provided for outputting from each of a plurality of monitoring units, for storage in storage circuitry, monitoring data indicative of a property of the data processing system, wherein at least one monitoring unit is provided within a power domain operable in a low power mode where the at least one monitoring unit is unable to output monitoring data. A system control processor is employed to read the monitoring data from the storage circuitry, and to perform system control operations in dependence on the monitoring data. In response to a notification that the power domain is to be placed into the low power mode, status data is output indicating that the at least one monitoring unit is disabled, and the status data is stored in the storage circuitry. Subsequently, the status data is provided to the system control processor in response to an attempt to read the monitoring data.
Continuously powered field device
A continuously powered field device for use in a process control system includes a field device housing, a primary power port disposed within or connected to the field device housing, and a power source switching module comprising a first power terminal, a second power terminal, and a third power terminal. The first power terminal is coupled to the primary power port, and the third power terminal is configured to deliver power applied to the third power terminal to at least a portion of the field device. The power source switching module is operable in a first state of operation to couple the first power terminal to the third power terminal, and the power source switching module is operable in a second state of operation to couple the second power terminal to the third power terminal.
Host controlled IO power management
Systems and methods of interconnecting devices may include an input/output (IO) connector having a buffer with an integrated voltage regulator. The integrated voltage regulator may include a first supply output and a second supply output, wherein the IO connector includes an IO power contact coupled to the first supply output. The IO connector may also include a logic power contact coupled to the second supply output. In one example, a host device may issue power management commands to the buffer in order to scale the second supply output independently of the first supply output.
Systems and methods for individually controlling power supply voltage to circuits in a semiconductor device
To individually control supply of the power supply voltage to circuits, a semiconductor device includes a CPU, a memory that reads and writes data used in arithmetic operation of the CPU, a signal processing circuit that generates an output signal by converting a data signal generated by the arithmetic operation of the CPU, a first power supply control switch that controls supply of the power supply voltage to the CPU, a second power supply control switch that controls supply of the power supply voltage to the memory, a third power supply control switch that controls supply of the power supply voltage to the signal processing circuit, and a controller that at least has a function of controlling the first to third power supply control switches individually in accordance with an input signal and instruction signals input from the CPU and the signal processing circuit.
Micro-architectural energy monitor event-assisted temperature sensing
Methods and apparatus relating to micro-architectural energy monitor event-assisted temperature sensing are described. In one embodiment, at least one of a plurality of slices of a computational logic or at least one of a plurality of sub-slices of the computational logic are powered down or powered up based on a comparison of a temperature value, that is determined based on one or more micro-architectural events, and a threshold value. Other embodiments are also disclosed and claimed.