G06F11/00

SYSTEM AND METHOD FOR MONITORING CODE OVERWRITE ERROR OF REDRIVER CHIP
20230008753 · 2023-01-12 ·

A system and method for monitoring a code overwrite error of a Redriver chip are disclosed. An analog to digital converter (ADC) monitors whether an EEPROM code of a Redriver chip has been overwritten in error. A Switch chip is utilized to separate the Redriver chip from a system management bus (SMbus) controller. A pull-up resistor keeps an SMbus at a Redriver chip/EEPROM side in a pull-up state. The ADC is utilized to monitor the SMbus. When an abnormal low level is monitored, an alarm signal is sent to the SMbus controller to give a risk alarm for an overwrite error. In addition, according to different ADC sampling rates, an SMbus may also be connected between the SMbus controller and an ADC with a high sampling rate, whereby SMbus data can be monitored.

System and method for trustworthiness, reputation, provenance, and measurement of software
11550903 · 2023-01-10 ·

In accordance with some embodiments, a method and system for establishing the trustworthiness of software and running systems by analyzing software and its provenance using automated means. In some embodiments, a risk score is produced. In some embodiments, software is analyzed for insecure behavior or structure. In some embodiments, parts of the software are hardened by producing possibly multiple different versions of the software with different hardening techniques applied, and a choice can be made based on user or environmental needs. In some embodiments, the software is verified and constraints are enforced on the endpoint using techniques such as verification injection and secure enclaves. In some embodiments, endpoint injection is managed through container orchestration.

ENHANCED PERFORMANCE DIAGNOSIS IN A NETWORK COMPUTING ENVIRONMENT

Embodiments provide enhanced performance diagnosis in a network computing environment. In response to an occurrence of a performance issue for a node while under operating conditions, common logs for applications on the node are analyzed. The applications are respectively registered in advance for diagnosis services. The applications each register rules in advance for the diagnosis services. At a time of the performance issue, debug programs are automatically issued to generate debug level logs respectively for the applications. Debug level logs are analyzed according to the rules to determine a root cause of the performance issue. A potential solution to the root cause of the performance issue is determined using the rules, without having to recreate the operating conditions occurring during the performance issue. The potential solution to rectify the root cause of the performance issue is executed without having to recreate the operating conditions occurring during the performance issue.

Integrated remediation system for network-based services

This disclosure describes automatically collecting, analyzing, and remediating operational issues with respect to systems executing within a network. For example, a service provider network may include a monitoring service may generate notifications related to operational issues upon detection of operational issues within a system executing within the service provider network. The monitoring service may provide one or more notifications related to an aggregation service that may aggregate the one or more notifications into a standardized format. Contextual information related to the operational issues may be automatically gathered by an analytics service, which may analyze the contextual information to determine a potential cause of the operational issues. Based on the potential cause, a remediation service may automatically remediate the operational issues.

Maintaining an active track data structure to determine active tracks in cache to process

Provided are a computer program product for managing tracks in a storage in a cache. An active track data structure indicates tracks in the cache that have an active status. An active bit in a cache control block for a track is set to indicate active for the track indicated as active in the active track data structure. In response to processing the cache control block, a determination is made, from the cache control block for the track, whether the track is active or inactive to determine processing for the cache control block.

MONITORING STACK MEMORY USAGE TO OPTIMIZE PROGRAMS

A computer system determines stack usage. An intercept function is executed to store a stack marker in a stack, wherein the intercept function is invoked when a program enters or exits each function of a plurality of functions of the program. A plurality of stack markers are identified in the stack and a memory address is determined for each stack marker during execution of the program to obtain a plurality of memory addresses. The plurality of memory addresses are analyzed to identify a particular memory address associated with a greatest stack depth. A stack usage of the program is determined based on the greatest stack depth. Embodiments of the present invention further include a method and program product for determining stack usage in substantially the same manner described above.

INTELLIGENT SELECTION OF OPTIMIZATION METHODS IN HETEROGENEOUS ENVIRONMENTS

Intelligent selection of optimization methods in heterogeneous environments is described. In some embodiments, an Information Handling System (IHS) may include a processor and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to: identify a context; rank a plurality of optimization methods based upon the context; and execute at least a subset of the ranked optimization methods.

Maintaining Data Integrity Through Power Loss with Operating System Control

A storage controller has an operating system (OS) and power control firmware configured to manage use of battery power during a power outage event. The OS specifies to the power control firmware first and second sets of physical components that should be shed by power control firmware during a two-phase vault process. Upon a power failure, the power control firmware turns off power to the first set of physical components and notifies the OS of the power failure. The OS determines whether to abort or continue the vault process. If the OS aborts the vault process, the power control firmware restores power to the first set of physical components. If the OS continues the vault process, the power control firmware turns off power to the second set of physical components, the OS saves application state, and moves all data from volatile memory to persistent memory.

Methods and systems for exchange of equipment performance data

A method for exchange of equipment performance data includes the steps of: obtaining performance data of a communicatively-insulated device; converting the performance data into a scannable code; capturing an image of the scannable code; decoding the scannable code using a communicatively-enabled device to extract an address string encoded in the scannable code, the address string comprising an address of a remote server and the performance data; initiating, by the communicatively-enabled device, a communications link with the remote server using the address string thereby to provide the performance data to the remote server; performing, by the remote server, analytics on the performance data; and sending historic device performance data and/or analytical results to a remote computing device and/or sending a link to the historic device performance data and/or analytical results to the remote computing device; wherein the communicatively-insulated device is packaging equipment and wherein obtaining the performance data comprises: running a calibration phantom through the packaging equipment; scanning the calibration phantom with a calibration unit; and using the calibration unit to generate a system status report identifying one or more operational parameters of the packaging equipment.

VISUALIZATION SYSTEM FOR DEBUG OR PERFORMANCE ANALYSIS OF SOC SYSTEMS
20230045254 · 2023-02-09 ·

An interface receives reported information from a system on chip (SOC), where the reported information includes: (1) hardware-reported information that is reported by a hardware functional module included in the SOC and (2) firmware-reported information that is reported by a firmware functional module included in the SOC. A processor receives one or more display settings and generates visual information based at least in part on: (1) the one or more display settings, (2) the hardware-reported information, and (3) the firmware-reported information. The visual information is displayed via a display.