Systems, apparatuses and methods include technology that receives, with a first plurality of multipliers of a multiply-accumulator (MAC), first digital signals from a memory array, wherein the first plurality of multipliers includes a plurality of capacitors. The technology further executes, with the first plurality of multipliers, multibit computation operations with the plurality of capacitors based on the first digital signals, and generates, with the first plurality of multipliers, a first analog signal based on the multibit computation operations.

Real time cognitive reasoning using a circuit with varying confidence level alerts including receiving a first set of data results and a second set of data results; transferring a first unit of charge from a first charge capacitor on the A-B circuit to a collection capacitor on the A-B circuit for each of the first set of data results that indicates a positive data point; transferring a second unit of charge from a second charge capacitor to the collection capacitor for each of the second set of data results that indicates a positive data point; and triggering a first sense amp on the A-B circuit if the charge on the collection capacitor exceeds a first charge threshold, indicating that the positive data points in the first set of data results is greater than the positive data points in the second set of data results to a first statistical significance with a first confidence level.

Real time cognitive reasoning using a circuit with varying confidence level alerts including receiving a first set of data results and a second set of data results; transferring a first unit of charge from a first charge capacitor on the A-B circuit to a collection capacitor on the A-B circuit for each of the first set of data results that indicates a positive data point; transferring a second unit of charge from a second charge capacitor to the collection capacitor for each of the second set of data results that indicates a positive data point; and triggering a first sense amp on the A-B circuit if the charge on the collection capacitor exceeds a first charge threshold, indicating that the positive data points in the first set of data results is greater than the positive data points in the second set of data results to a first statistical significance with a first confidence level.

A data processing system may include a processing memory including a plurality of sub-arrays, and a controller that controls the processing memory, detects a valid component from a first operand received from an exterior and having a digital level, applies a voltage corresponding to the valid component having a digital level to a row line of at least one sub-array, and stores a second operand received from an exterior in the at least one sub-array.

A data processing system may include a processing memory including a plurality of sub-arrays, and a controller that controls the processing memory, detects a valid component from a first operand received from an exterior and having a digital level, applies a voltage corresponding to the valid component having a digital level to a row line of at least one sub-array, and stores a second operand received from an exterior in the at least one sub-array.

A hybrid wave computer that computes an inputted original signal as frequency information includes: an input module configured to separate a frequency of the original signal by detecting an oscillation of an piezoelectric element by each position as the original signal having an embedded frequency of several bands is transmitted in a form of acoustic waves on a substrate provided with the piezoelectric element; a calculation module including at least one vibration amplifier or vibration damper for receiving the frequency of the original signal separated in the input module and amplifying or attenuating a wave for each frequency band to calculate the inputted original signal in a frequency band; and a storage module configured to store binarized frequency information in the calculation module as digital information, so that the original signal is interfaced in a form of waves.

A mixed-signal integrated circuit that includes: a global reference signal source; a first summation node and a second summation node; a plurality of distinct pairs of current generating circuits arranged along the first summation node and the second summation node; a first current generating circuit of each of the plurality of distinct pairs that is arranged on the first summation node and a second current generating circuit of each of the plurality of distinct pairs is arranged on the second summation node; a common-mode current circuit that is arranged in electrical communication with each of the first and second summation nodes; where a local DAC adjusts a differential current between the first second summation nodes based on reference signals from the global reference source; and a comparator or a finite state machine that generates a binary output value current values obtained from the first and second summation nodes.

An adapter device includes a printed circuit board (PCB), an output port disposed on the PCB and having first pins, where the output port is to be connected to an output harness that is connected to an adaptive device. The adapter also includes wireless circuitry one of disposed on or coupled to the PCB and a processing device disposed on the PCB and coupled to the output port and wireless circuitry. The processing device is to: identify, via the wireless circuitry, an actuation command from a wireless signal received from a handheld electronic device; translate the actuation command to one or more actuation bits that match one of analog-converted bits receivable over an input harness or digital control bits receivable over a wireless controller associated with the adaptive device; and provide the actuation bits to the first pins, the actuation bits causing the adaptive device to perform a specific action.

An adapter device includes a printed circuit board (PCB), an output port disposed on the PCB and having first pins, where the output port is to be connected to an output harness that is connected to an adaptive device. The adapter also includes wireless circuitry one of disposed on or coupled to the PCB and a processing device disposed on the PCB and coupled to the output port and wireless circuitry. The processing device is to: identify, via the wireless circuitry, an actuation command from a wireless signal received from a handheld electronic device; translate the actuation command to one or more actuation bits that match one of analog-converted bits receivable over an input harness or digital control bits receivable over a wireless controller associated with the adaptive device; and provide the actuation bits to the first pins, the actuation bits causing the adaptive device to perform a specific action.

An integrated-circuit neural network includes chain of multiply-accumulate units co-located with a high-bandwidth storage array. Each multiply accumulate includes a digital input port, analog input port and multiply-adder circuitry. The digital input port receives a matrix of digital-weight values from the storage array and the analog input port receives a counterpart matrix of analog input signals, each analog input signal exhibiting a respective electronic current representative of input value. The multiply-adder circuitry generates a matrix of analog output signals by convolving the matrix of digital-weight values with the matrix of analog input signals including, for each analog output signal within the matrix of analog output signals, switchably enabling weighted current contributions to the analog output signal based on logic states of on respective bits of one or more of the digital-weight values.