Patent classifications
G06N10/00
Fault tolerant computation method and apparatus for quantum Clifford circuit, device, and chip
This application discloses a fault tolerant computation method and device for a quantum Clifford circuit with reduced resource requirement. The method includes decomposing a quantum Clifford circuit into s logic Clifford circuits and preparing auxiliary quantum states corresponding to the s logic Clifford circuits. For each logic Clifford circuit, the method further includes teleporting an input quantum state corresponding to the logic Clifford circuit to an auxiliary qubit, processing a quantum state obtained after the teleportation by the logic Clifford circuit to obtain a corresponding output quantum state; measuring a corresponding error symptom based on the input quantum state and the auxiliary quantum state; and performing error correction on the output quantum state according to the error symptom to obtain an error-corrected output quantum state.
Simultaneously entangling gates for trapped-ion quantum computers
A method of performing simultaneous entangling gate operations in a trapped-ion quantum computer includes selecting a gate duration value and a detuning frequency of pulses to be individually applied to a plurality of participating ions in a chain of trapped ions to simultaneously entangle a plurality of pairs of ions among the plurality of participating ions by one or more predetermined values of entanglement interaction, determining amplitudes of the pulses, based on the selected gate duration value, the selected detuning frequency, and the frequencies of the motional modes of the chain of trapped ions, generating the pulses having the determined amplitudes, and applying the generated pulses to the plurality of participating ions for the selected gate duration value. Each of the trapped ions in the chain has two frequency-separated states defining a qubit, and motional modes of the chain of trapped ions each have a distinct frequency.
Simultaneously entangling gates for trapped-ion quantum computers
A method of performing simultaneous entangling gate operations in a trapped-ion quantum computer includes selecting a gate duration value and a detuning frequency of pulses to be individually applied to a plurality of participating ions in a chain of trapped ions to simultaneously entangle a plurality of pairs of ions among the plurality of participating ions by one or more predetermined values of entanglement interaction, determining amplitudes of the pulses, based on the selected gate duration value, the selected detuning frequency, and the frequencies of the motional modes of the chain of trapped ions, generating the pulses having the determined amplitudes, and applying the generated pulses to the plurality of participating ions for the selected gate duration value. Each of the trapped ions in the chain has two frequency-separated states defining a qubit, and motional modes of the chain of trapped ions each have a distinct frequency.
Amplitude, frequency, and phase modulated simultaneous entangling gates for trapped-ion quantum computers
A method of performing a computation using a quantum computer includes generating a plurality of laser pulses used to be individually applied to each of a plurality of trapped ions that are aligned in a first direction, each of the trapped ions having two frequency-separated states defining a qubit, and applying the generated plurality of laser pulses to the plurality of trapped ions to perform simultaneous pair-wise entangling gate operations on the plurality of trapped ions. Generating the plurality of laser pulses includes adjusting an amplitude value and a detuning frequency value of each of the plurality of laser pulses based on values of pair-wise entanglement interaction in the plurality of trapped ions that is to be caused by the plurality of laser pulses.
Amplitude, frequency, and phase modulated simultaneous entangling gates for trapped-ion quantum computers
A method of performing a computation using a quantum computer includes generating a plurality of laser pulses used to be individually applied to each of a plurality of trapped ions that are aligned in a first direction, each of the trapped ions having two frequency-separated states defining a qubit, and applying the generated plurality of laser pulses to the plurality of trapped ions to perform simultaneous pair-wise entangling gate operations on the plurality of trapped ions. Generating the plurality of laser pulses includes adjusting an amplitude value and a detuning frequency value of each of the plurality of laser pulses based on values of pair-wise entanglement interaction in the plurality of trapped ions that is to be caused by the plurality of laser pulses.
Efficient synthesis of a random uniformly distributed Clifford unitary
A method of generating a random uniformly distributed Clifford unitary circuit (C) includes: generating a random Hadamard (H) gate; drawing a plurality of qubits from a probability distribution of qubits; applying the random H gate to the plurality of qubits drawn from the probability distribution; and generating randomly a first Hadamard-free Clifford circuit (F1) and a second Hadamard-free Clifford circuit (F2). The first and second Hadamard-free Clifford circuits is generated by at least randomly generating a uniformly distributed phase (P) gate, and randomly generating a uniformly distributed linear Boolean invertible conditional NOT (CNOT) gate, and combining the P and CNOT gates to form the first and second Hadamard-free Clifford circuits. The method further includes combining the generated first Hadamard-free circuit (F1) and the second Hadamard-free Clifford circuit (F2) with the generated random Hadamard (H) gate to form the random uniformly distributed Clifford unitary circuit (C).
Efficient synthesis of a random uniformly distributed Clifford unitary
A method of generating a random uniformly distributed Clifford unitary circuit (C) includes: generating a random Hadamard (H) gate; drawing a plurality of qubits from a probability distribution of qubits; applying the random H gate to the plurality of qubits drawn from the probability distribution; and generating randomly a first Hadamard-free Clifford circuit (F1) and a second Hadamard-free Clifford circuit (F2). The first and second Hadamard-free Clifford circuits is generated by at least randomly generating a uniformly distributed phase (P) gate, and randomly generating a uniformly distributed linear Boolean invertible conditional NOT (CNOT) gate, and combining the P and CNOT gates to form the first and second Hadamard-free Clifford circuits. The method further includes combining the generated first Hadamard-free circuit (F1) and the second Hadamard-free Clifford circuit (F2) with the generated random Hadamard (H) gate to form the random uniformly distributed Clifford unitary circuit (C).
Streaming execution for a quantum processing system
Interactions between a classical computing system and a quantum computing system can be structured to increase the effective memory available to hold instructions for a quantum processor. The system stores a schedule of compiled quantum processing instructions in a memory storage location on a classical computing system. A small program memory is included in close proximity to a control system for the quantum processor on the quantum computing system. The classical computing system sends a subset of instructions from the schedule of quantum instructions to the program memory. The control system manages execution of the instructions by accessing them at the program memory and configuring the quantum processor accordingly. While the quantum processor executes the instructions, additional instructions are transferred from the classical computing system to the program memory to await execution. The quantum system can execute many instructions quickly without idling while instructions are fetched from a large memory.
Streaming execution for a quantum processing system
Interactions between a classical computing system and a quantum computing system can be structured to increase the effective memory available to hold instructions for a quantum processor. The system stores a schedule of compiled quantum processing instructions in a memory storage location on a classical computing system. A small program memory is included in close proximity to a control system for the quantum processor on the quantum computing system. The classical computing system sends a subset of instructions from the schedule of quantum instructions to the program memory. The control system manages execution of the instructions by accessing them at the program memory and configuring the quantum processor accordingly. While the quantum processor executes the instructions, additional instructions are transferred from the classical computing system to the program memory to await execution. The quantum system can execute many instructions quickly without idling while instructions are fetched from a large memory.
Spinel superconducting tunnel junction for quantum devices
Superconducting tunnel junctions for use in, for instance, quantum processors. In one example, a quantum processor can have at least one qubit structure. The at least one qubit structure includes a first aluminum layer, a second aluminum layer, and a crystalline dielectric layer disposed between the first aluminum layer and the second aluminum layer. The crystalline dielectric layer includes a spinel crystal structure.