A display device including: a display panel including a pixel connected to a first scan line, second scan line, and data line, the pixel including: a first switch connected to the first scan line; a second switch connected to the second scan line; and a light emitting element; a low-frequency driving controller to output a power control signal having a first level in a first mode and a second power control signal having a second level in a second mode; a scan driver including first and second scan drivers to drive the first and second scan lines, wherein one of the first and second scan drivers operates in the second mode; and a data driver to operate in the second mode in response to the power control signal having the second level, wherein the data driver operates at a frequency lower than a reference frequency in the second mode.

The present disclosure discloses a shift register unit and a driving method thereof, a shift register circuit and a display device, and relates to the field of display technology, in order to solve problems of the conventional shift register that it has a complex structure, and occupies a too larger space. The shift register unit comprises an input module for receiving a signal of an input signal terminal and a signal of a high level terminal, a reset module for resetting an output terminal of the shift register unit and a pull-up control node, a pull-down module for discharging the pull-up control node and the output terminal of the shift register unit, a pull-down control module for generating a power supply enable signal and a power supply signal, and an output control module for generating a gate drive signal and outputting the power supply enable signal, the power supply signal and the gate drive signal. The shift register unit provided by the present disclosure is applied to the display device.

A light source apparatus includes a plurality of light source groups, wherein each light source group has: a plurality of first light sources configured to emit light of a first color; a plurality of second light sources configured to emit light of a second color; and a plurality of third light sources configured to emit light of a third color, and a distance between the plurality of second light sources of the same light source group and a distance between the plurality of third light sources of the same light source group are each shorter than a minimum value of a distance between the plurality of first light sources of the same light source group.

Disclosed is an electroluminescent display device using a variable refresh rate (VRR) mode. The purpose of the present disclosure is to reduce the occurrence of a difference in luminance at a time point of a refresh rate change, thereby preventing viewers from perceiving the variation of the refresh rate.

An object is to provide a display device that performs accurate display. A circuit is formed using a transistor that includes an oxide semiconductor and has a low off-state current. A precharge circuit or an inspection circuit is formed in addition to a pixel circuit. The off-state current is low because the oxide semiconductor is used. Thus, it is not likely that a signal or voltage is leaked in the precharge circuit or the inspection circuit to cause defective display. As a result, a display device that performs accurate display can be provided.

A system reads a desired circuit parameter from a pixel circuit that includes a light emitting device, a drive device to provide a programmable drive current to the light emitting device, a programming input, and a storage device to store a programming signal. One embodiment of the extraction system turns off the drive device and supplies a predetermined voltage from an external source to the light emitting device, discharges the light emitting device until the light emitting device turns off, and then reads the voltage on the light emitting device while that device is turned off. The voltages on the light emitting devices in a plurality of pixel circuits may be read via the same external line, at different times.

A shift register and driving method thereof, and a gate driving circuit. The shift register of the present disclosure comprises: an input unit for controlling whether the signal of a first input end is inputted to a charging unit; a charging unit for charging a pull-up node; a pull-up unit for maintaining a high level of the pull-up node; a high level output unit for controlling whether the high level is outputted to the output end according to the level of the pull-up node; a pull-down unit for pulling down the level of the pull-up node and outputting the low level to the output end; a low level output unit for outputting the low level to the output end. The gate driving circuit of the present disclosure is formed by cascading a plurality of the above shift registers.

A shift register unit and a method for driving the shift register unit, a gate drive circuit and a display device are provided. The shift register unit includes an inputting unit, an outputting unit, a reset unit, a first control unit and a second control unit, a first node, a second node, a third node, a shift signal outputting terminal and multiple inputting terminals. A width of a shift pulse output by the shift register unit may be adjusted by adjusting a width of a shift pulse input to the shift register unit, and the output shift pulse and the input shift pulse have an identical width.

The present disclosure discloses an organic light-emitting display panel and a driving method thereof, and an organic light-emitting display device. The organic light-emitting display panel comprises a pixel array, a plurality of pixel driving circuits, a plurality of reference voltage signal lines and a plurality of data voltage signal lines. The plurality of pixel driving circuits include a first, second and third pixel driving circuits, the first pixel driving circuit and the second pixel driving circuit are adjacent to each other in a row direction of the pixel array, and the second pixel driving circuit and the third pixel driving circuit are adjacent to each other in the row direction of the pixel array. The first pixel driving circuit and the second pixel driving circuit share one reference voltage signal line, and the second pixel driving circuit and the third pixel driving circuit share one data voltage signal line.

A near-eye display system includes a display assembly comprising at least one display panel and a display driver to drive the display assembly to display a sequence of frames in a low-persistence mode based on a frame clock signal having a first frequency. The near-eye display system further includes a pair of liquid membrane lenses facing the display assembly, and a lens driver having an output coupled to an input of each of liquid membrane lenses of the pair, the lens driver to generate at the output a periodic, continuously variable driving signal having a second frequency, wherein the first frequency is an integer multiple of the second frequency. As the liquid membrane lenses are synchronized with the low-persistence display of the sequence of frames, each displayed frame is perceived through the liquid membrane lenses at a different nearly constant focal depth, and thus creating a perception to the user of multiple focal planes in the displayed imagery.