An assembly including an insulated gate bipolar transistor (IGBT) is provided. The IGBT is coupled with a gate driver for receiving a gating signal to drive the IGBT and providing a feedback signal of the IGBT which indicates a change of a collector-emitter voltage of the IGBT. The assembly further includes a failure mode detection unit for determining whether the IGBT is faulted based on a timing sequence of the gating signal and feedback signal. The failure mode detection unit is capable of differentiating fault types including a gate driver fault, a failed turn-on fault, a short-circuit fault, a turn-on over-voltage fault and a turn-off over-voltage fault. Accordingly, an IGBT failure mode detection method is also provided.

An integrated circuit device includes a drive circuit that outputs a first drive waveform signal for dot matrix display and a second drive waveform signal for segment display, a first output terminal, a second output terminal, and a control circuit that controls the drive circuit. The drive circuit outputs the first drive waveform signal to the first output terminal when its terminal is set as the output terminal for dot matrix display, and outputs the second drive waveform signal to the first output terminal when its terminal is set as the output terminal for segment display. The drive circuit outputs the first drive waveform signal to the second output terminal when its terminal is set as the output terminal for dot matrix display, and outputs the second drive waveform signal to the second output terminal when its terminal is set as the output terminal for segment display.

A display device includes a display panel including a plurality of pixels each coupled to a write scan line, a compensation scan line, an initialization scan line, a bypass scan line, and a data line; and a scan driver configured to supply i (where i is a natural number) write scan pulses, compensation scan pulses, initialization scan pulses, and bypass scan pulses to the write scan line, the compensation scan line, the initialization scan line, and the bypass scan line, respectively, during a first period corresponding to one frame period, and to supply j (where j is a natural number other than i) write scan pulses to the write scan line during each of frame periods of a second period including a plurality of consecutive frame periods.

Provided is a configuration for executing display information output control with improved visibility of a user wearable or portable display unit. A controller configured to execute display information output control on a user wearable or portable display unit is included. The controller sets a turning on (ON) period and a turning off (OFF) period and controls switching between afterimage consideration pulse display having the turning off period being set to be within an afterimage recognition period and normal pulse display having the turning off period being set to be longer than or equal to the afterimage recognition period, the turning on (ON) period being an output period of display information to the display unit, the turning off (OFF) period being a non-output period of display information to the display unit. The controller executes the switching control between the afterimage consideration pulse display and the normal pulse display depending on eye velocity of a user. The controller executes the afterimage consideration pulse display in a case where eye velocity of the user is less than a threshold and executes the normal pulse display in a case where the eye velocity is more than or equal to the threshold.

A gate driver includes a first scan signal generator configured to output a logic voltage for driving of a scan transistor through a plurality of stages connected in cascade, the scan transistor performing a switching operation to transfer a data voltage to a driving transistor of a pixel, a second scan signal generator configured to output a logic voltage for driving of a sensing transistor through the plurality of stages, the sensing transistor sensing deterioration of a light emitting element of the pixel, a light emission control signal generator configured to output a logic voltage for control of a light emission control transistor of the pixel through the plurality of stages, and an initialization voltage generator driven by logic voltages received from some nodes of the first scan signal generator based on the light emission control signal generator to supply an initialization voltage to the pixel.

A pixel of an organic light emitting diode (“OLED”) display device includes a switching transistor which transfers a data voltage, a storage capacitor which stores the data voltage transferred by the switching transistor, a driving transistor which generates a driving current based on the data voltage stored in the storage capacitor, an emission control transistor which selectively forms a path for the driving current in response to an emission control signal, an OLED which emits light based on the driving current, and a supplemental electrode overlapping a gate electrode of the driving transistor, the supplemental electrode having a first voltage for a predetermined time period from a time point at which the emission control signal has a turn-on level, and having a second voltage after the predetermined time period.

An electro-optic display having a plurality of pixels is driven from a first image to a second image using a first drive scheme, and then from the second image to a third image using a second drive scheme different from the first drive scheme and having at least one impulse differential gray level having an impulse potential different from the corresponding gray level in the first drive scheme. Each pixel which is in an impulse differential gray level in the second image is driven from the second image to the third image using a modified version of the second drive scheme which reduces its impulse differential The subsequent transition from the third image to a fourth image is also conducted using the modified second drive scheme but after a limited number of transitions using the modified second drive scheme, all subsequent transitions are conducted using the unmodified second drive scheme.

Circuits for programming, monitoring, and driving pixels in a display are provided. Circuits generally include a driving transistor to drive current through a light emitting device according to programming information which is stored on a storage device, such as a capacitor. One or more switching transistors are generally included to select the circuits for programming, monitoring, and/or emission. Circuits advantageously incorporate emission transistors to selectively couple the gate and source terminals of a driving transistor to allow programming information to be applied to the driving transistor independently of a resistance of a switching transistor.

Methods for driving electro-optic displays, especially bistable displays, include (a) using two-part waveforms, the first part of which is dependent only upon the initial state of the relevant pixel; (b) measuring the response of each individual pixel and storing for each pixel data indicating which of a set of standard drive schemes are to be used for that pixel; (c) for at least one transition in a drive scheme, applying multiple different waveforms to pixels on a random basis; and (d) when updating a limited area of the display, driving “extra” pixels in an edge elimination region to avoid edge effects.

The present disclosure provides a display panel and a display device, and the display panel includes: a plurality of data lines; a plurality of scan lines respectively interlaced with the plurality of data lines and forming a plurality of interlaced points at interlaced positions; and a plurality of pixel units, where each of the pixel units includes a plurality of sub-pixel units, which are arranged in an array of a plurality of columns in a first direction and a plurality of rows in a second direction, and are electrically connected to the plurality of interlaced points in a one-to-one correspondence. The same data line is electrically connected sequentially and alternately with the plurality of sub-pixel units arranged in two adjacent columns in the first direction. The present disclosure also provides a display device comprising the above display panel.