A color electrophoretic display that includes sets of duplicative waveforms to reduce visible artifacts during image updates. Such methods include driving extra pixels where the boundary between a driven and undriven area would otherwise lead to artifact by providing paired sets of driving instructions, allowing the undriven area to be driven while maintain the desired (undriven) optical state.

A display substrate, a display panel, a display apparatus, and a display driving method are provided. The display substrate includes: a display region and a peripheral region at a periphery thereof. Gate lines, data lines and a pixel array are in the display region. The pixel array includes pixel units each coupled to a corresponding gate line and data line, and color mixing pixel columns each including multiple pixel units emitting light of different colors and including periodic structures along the column direction. The number of pixel units in each periodic structure is constant. A gate driving circuit is in the peripheral region and includes cascaded shift registers each having a cascading signal output terminal and scanning signal output terminals each coupled to a corresponding gate line. The number of scanning signal output terminals of each shift register is equal to the number of pixel units in each periodic structure.

A driving circuit, a driving method and a microfluidic substrate are provided. The driving circuit includes a first switching unit, a second switching unit, a reset unit, a first capacitor, and a second capacitor. In a first stage of a driving process of the driving circuit, the first switching unit is turned on, a first voltage signal is transmitted to a first node, the second switching unit is turned on, a second voltage signal is input to an output terminal of the driving circuit, and the driving circuit outputs an AC signal. In a second stage of the driving process, the first switching unit is turned off, the valid signal output by the second scan signal terminal controls the reset unit to be turned on, a third voltage signal is input to the output terminal of the driving circuit for reset, and the driving circuit outputs a DC signal.

Disclosed are a display apparatus, a drive chip, and an electronic device. When determining that a disconnected signal line exists, the drive chip sends a control signal to a signal line repair module, so that when a shift output end of the first shift unit corresponding to the disconnected signal line outputs an enable signal, a selector switch corresponding to the shift output end is turned on, and then a connection control unit keeps outputting a turn-on signal to a control end of a corresponding connection switch.

An electronic device includes a display panel including pixels respectively connected to scan lines, scan stages corresponding to the scan lines, where each of the scan stages receives a carry signal, and outputs a scan signal, masking circuits electrically connected to some of the scan stages, respectively, where each of the masking circuits outputs a masking carry signal in response to a masking signal and the scan signal, and transmission circuits electrically connected to others of the scan stages, respectively, where each of the transmission circuits outputs the scan signal output from a corresponding scan stage among the scan stages. A j-th (j is an integer greater than 1) scan stage among the scan stages receives one of the scan signal output from a (j−1)-th scan stage and the masking carry signal as the carry signal.

The present disclosure provides a display panel, a method for driving the display panel, and a display apparatus. The display panel includes multiple pixel circuits. The pixel circuit includes a drive transistor and at least one switch unit. At least one switch unit includes M thin film transistors connected in parallel, and M is a positive integer greater than or equal to 2. The M thin film transistors are configured to be turned on during different display phases, respectively.

A dot-matrix display device includes a display, a converter circuit, and a control circuit. The display includes multiple gate signal lines, multiple source signal lines, and multiple pixel circuits arranged at intersections of the multiple gate signal lines and source signal lines. The converter circuit obtains a serial signal SI in synchronization with a first clock signal SCK input from outside and converts the obtained serial signal to a parallel signal. The serial signal is input from outside serially. The serial signal includes address data for specifying, of the multiple pixel circuits, a pixel circuit to undergo a refresh of image data, and the image data to be provided to the specified pixel circuit. The control circuit generates, based on a second clock signal ENB_V having a lower frequency than the first clock signal, a control signal for controlling timing of serial-to-parallel conversion performed by the converter circuit.

A display driver includes: a driver circuit that drives an electro-optical panel; an output terminal that outputs an output signal from the driver circuit; an output line that couples the output of the driver circuit and the output terminal; and an inspection circuit that detects an abnormality of the output signal output by the driver circuit to the output line by monitoring a voltage of the output signal. The inspection circuit determines whether the voltage of the output signal is abnormal by comparing the voltage of the output signal with a reference voltage whose voltage changes in each given cycle.

An array substrate and a display panel are disclosed; at least one GOA circuit is provided in a pixel area of a same row, all GOA circuits of the same row are connected to a same scan line, and each GOA circuit of the same row is connected to a driving IC through a corresponding driving signal line. By setting the GOA circuit in a display area, a near bezel-free display panel design can be realized. Meanwhile, the GOA circuit is modularly designed to form an independent layout model, which improves design efficiency.

Disclosed are a display substrate and a manufacturing method thereof, and a display apparatus. The display substrate includes, in a plane parallel to the display substrate, a plurality of gate lines, a plurality of data lines, a plurality of power lines and a plurality of sub-pixels arranged on a base substrate. At least one sub-pixel includes a light-emitting device and a driving circuit configured to drive the light-emitting device to emit light. The driving circuit includes a plurality of transistors and a storage capacitor. The display substrate includes, in a plane perpendicular to the display substrate, a base substrate and a plurality of functional layers. The plurality of functional layers includes a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer and a fourth conductive layer which are sequentially arranged.