G11B5/00

Devices including a near field transducer (NFT) with nanoparticles

Devices that include a near field transducer (NFT) including a crystalline plasmonic material having crystal grains and grain boundaries; and nanoparticles disposed in the crystal grains, on the grain boundaries, or some combination thereof, wherein the nanoparticles are oxides of, lanthanum (La), barium (Ba), strontium (Sr), erbium (Er), hafnium (Hf), germanium (Ge), or combinations thereof; nitrides of zirconium (Zr), niobium (Nb), or combinations thereof; or carbides of silicon (Si), aluminum (Al), boron (B), zirconium (Zr), tungsten (W), titanium (Ti), niobium (Nb), or combinations thereof.

Magnetic disk device

According to one embodiment, a magnetic disk device includes a magnetic disk, a recording head and a controller configured to control the recording head. The recording head includes a high-frequency oscillator disposed in a write gap formed between a main magnetic pole and a return magnetic pole, and a bias voltage application circuit configured to apply a bias voltage to the high-frequency oscillator. The controller includes a bias voltage controller configured to change a bias voltage to be applied to the high-frequency oscillator in accordance with a sampling frequency of data before the data is recorded on the magnetic disk by the recording head.

Generating cognitive usage models for drive operations

A method includes gathering usage data of a tape drive during usage thereof and creating and/or updating a usage model based on the usage data. The method includes determining that the usage model has reached a predefined confidence level and performing an action in response to determining that the usage model has reached the predefined confidence level. A computer program product for increasing the life of tape drives includes a computer readable storage medium having program instructions embodied therewith. The computer program product includes program instructions executable by a computer. The program instructions cause the computer to perform the foregoing method.

Materials for near field transducers and near field transducers containing same

A device including a near field transducer, the near field transducer including gold (Au) and at least one other secondary atom, the at least one other secondary atom selected from: boron (B), bismuth (Bi), indium (In), sulfur (S), silicon (Si), tin (Sn), hafnium (Hf), niobium (Nb), manganese (Mn), antimony (Sb), tellurium (Te), carbon (C), nitrogen (N), and oxygen (O), and combinations thereof; erbium (Er), holmium (Ho), lutetium (Lu), praseodymium (Pr), scandium (Sc), uranium (U), zinc (Zn), and combinations thereof; and barium (Ba), chlorine (Cl), cesium (Cs), dysprosium (Dy), europium (Eu), fluorine (F), gadolinium (Gd), germanium (Ge), hydrogen (H), iodine (I), osmium (Os), phosphorus (P), rubidium (Rb), rhenium (Re), selenium (Se), samarium (Sm), terbium (Tb), thallium (Th), and combinations thereof.

Near-field transducer with recessed region
10482906 · 2019-11-19 · ·

A near-field transducer is situated at or proximate an air bearing surface of the apparatus and configured to facilitate heat-assisted magnetic recording on a medium. The near-field transducer includes an enlarged region comprising plasmonic material and having a first end proximate the air bearing surface. The near-field transducer also includes a disk region adjacent the enlarged region and having a first end proximate the air bearing surface. The disk region comprises plasmonic material. A peg region extends from the first end of the disk region and terminates at or proximate the air bearing surface. The near-field transducer further includes a region recessed with respect to the peg region. The recessed region is located between the peg region and the first end of the enlarged region.

Write signal interference cancellation across data/servo clock boundary
11967341 · 2024-04-23 · ·

A method for cancelling, from servo signals read in a read channel while a write channel is active, interference caused by write signals in the write channel, includes generating a predicted channel response signal from the write signals in a data clock domain, resampling the generated predicted channel response signal using a clock in the data clock domain having a rate corresponding to a servo clock from a servo clock domain, transferring the resampled predicted channel response signal from the data clock domain to the servo clock domain and aligning phase of the transferred resampled predicted channel response signal with phase of the servo clock, determining a domain-boundary-crossing delay incurred in the transferring, based on the domain-boundary-crossing delay, synchronizing the phase-aligned transferred resampled predicted channel response signal with the servo signals, and subtracting the synchronized phase-aligned transferred resampled predicted channel response signal from the servo signals.

Cancelling adjacent track interference

An apparatus may comprise a circuit configured to receive first underlying data corresponding to a first signal and receive a second signal corresponding to second underlying data. The circuit may determine an interference component signal based on the first underlying data corresponding to the first signal and a first channel pulse response shape for the first signal, determine estimated decisions corresponding to the second signal based on the second signal, and determine an estimated signal based on the estimated decisions corresponding to the second signal and a second channel pulse response shape for the second signal. The circuit may then generate a remaining signal based on the estimated signal and the second signal, generate an error signal based on the interference component signal and the remaining signal, and adapt one or more parameters of the first channel pulse response shape based on the error signal.

Cancelling adjacent track interference

An apparatus may comprise a circuit configured to receive first underlying data corresponding to a first signal and receive a second signal corresponding to second underlying data. The circuit may determine an interference component signal based on the first underlying data corresponding to the first signal and a first channel pulse response shape for the first signal, determine estimated decisions corresponding to the second signal based on the second signal, and determine an estimated signal based on the estimated decisions corresponding to the second signal and a second channel pulse response shape for the second signal. The circuit may then generate a remaining signal based on the estimated signal and the second signal, generate an error signal based on the interference component signal and the remaining signal, and adapt one or more parameters of the first channel pulse response shape based on the error signal.

Data storage device calibrating preamp clock using system clock
10459479 · 2019-10-29 · ·

A data storage device is disclosed comprising a head actuated over a disk, and preamp circuitry coupled to the head, wherein the preamp circuitry comprises a preamp clock and a clock counter configured to count cycles of the preamp clock. A start command over is transmitted from system circuitry over a serial interface to the preamp circuitry to begin counting a number of cycles of the preamp clock. The system circuitry receives a preamp command over the serial interface from the preamp circuitry, wherein the preamp command is based on the clock counter in the preamp circuitry. The system circuitry generates a frequency adjustment command based on the preamp command, and transmits the frequency adjustment command over the serial interface to the preamp circuitry in order to adjust a frequency of the preamp clock.

Magnetic head and magnetic recording medium processing device

This magnetic head, which reads and writes magnetic information, prevents a signal from being read between the magnetic head and the write circuit during reading of magnetic information. A card reader 1 is provided with a magnetic head 6 which reads and writes magnetic information. Bidirectional diodes 54A, 54B are arranged inside of a head case 21 of the magnetic head 6. A write signal from a write circuit 72 is inputted via the bidirectional diodes 54A, 54B to a writing coil 34 wound around a core 32 of the magnetic head 6. The bidirectional diodes 54A, 54B and a demodulation IC 61 are mounted on a first board surface 62A of a control circuit board 62, and the control circuit board 62 is fixed to the head case 21 so that the bidirectional diodes 54A, 54B and the demodulation IC 61 are covered by the head case 21.