Disclosed are ferroelectric devices including devices for performing a multiplication of analog input signals and resonators. In one aspect, a ferroelectric nanoelectromechanical device includes a first structural beam, a first input electrode disposed on a first top portion of the first structural beam, and an output electrode. The apparatus further includes a first ferroelectric film disposed on a second top portion of the first input electrode, and a first resistive layer disposed on a third top portion of the first ferroelectric film, wherein a first electrode is positioned at a first end of the first resistive layer and a second electrode is positioned at a second end of the first resistive layer.

Disclosed are ferroelectric devices including devices for performing a multiplication of analog input signals and resonators. In one aspect, a ferroelectric nanoelectromechanical device includes a first structural beam, a first input electrode disposed on a first top portion of the first structural beam, and an output electrode. The apparatus further includes a first ferroelectric film disposed on a second top portion of the first input electrode, and a first resistive layer disposed on a third top portion of the first ferroelectric film, wherein a first electrode is positioned at a first end of the first resistive layer and a second electrode is positioned at a second end of the first resistive layer.

This disclosure describes techniques for generating physically unclonable functions (PUF) from non-volatile memory cells. The PUFs leverage resistance variations in non-volatile memory cells. Resistance variations in array of non-volatile memory cells may be produce a bitstring during an enrollment process. The bitstring may be stored in the non-volatile memory array. Regeneration may include retrieving the bitstring from the non-volatile memory array.

This disclosure describes techniques for generating physically unclonable functions (PUF) from non-volatile memory cells. The PUFs leverage resistance variations in non-volatile memory cells. Resistance variations in array of non-volatile memory cells may be produce a bitstring during an enrollment process. The bitstring may be stored in the non-volatile memory array. Regeneration may include retrieving the bitstring from the non-volatile memory array.

A mechanical memory transistor includes a substrate having formed thereon a source region and a drain region. An oxide is formed upon a portion of the source region and upon a portion of the drain region. A pull up electrode is positioned above the substrate such that a gap is formed between the pull up electrode and the substrate. A movable gate has a first position and a second position. The movable gate is located in the gap between the pull up electrode and the substrate. The movable gate is in contact with the pull up electrode when the movable gate is in a first position and is in contact with the oxide to form a gate region when the movable gate is in the second position. The movable gate, in conjunction with the source region and the drain region and when the movable gate is in the second position, form a transistor that can be utilized as a non-volatile memory element.

A mechanical memory transistor includes a substrate having formed thereon a source region and a drain region. An oxide is formed upon a portion of the source region and upon a portion of the drain region. A pull up electrode is positioned above the substrate such that a gap is formed between the pull up electrode and the substrate. A movable gate has a first position and a second position. The movable gate is located in the gap between the pull up electrode and the substrate. The movable gate is in contact with the pull up electrode when the movable gate is in a first position and is in contact with the oxide to form a gate region when the movable gate is in the second position. The movable gate, in conjunction with the source region and the drain region and when the movable gate is in the second position, form a transistor that can be utilized as a non-volatile memory element.

Nanotube films and articles and methods of making the same are disclosed. A conductive article or a substrate comprises at least two unaligned nanotubes extending substantially parallel to the substrate and each contacting end points of the article but each unaligned relative to the other, the nanotubes providing a conductive pathway within a predefined space.

Nanotube films and articles and methods of making the same are disclosed. A conductive article or a substrate comprises at least two unaligned nanotubes extending substantially parallel to the substrate and each contacting end points of the article but each unaligned relative to the other, the nanotubes providing a conductive pathway within a predefined space.

A device for the storage and/or processing of quantum information comprises: a body (6), formed from a material having negligible net nuclear or electronic magnetic field; a set of data entities (4) embedded in said body, each having a plurality of magnetic field states; a set of probes (2), offset from the body, arranged to acquire internal phase shifts due to the magnetic fields of said data entities; wherein the probes (2) are each arranged to move relative to a plurality of data entities (4) in order that each probe (2) acquires an internal phase shift from the plurality of data entities (4); and means for reading each probe (2), thereby establishing a parity of the plurality of data entities (4).

A device for the storage and/or processing of quantum information comprises: a body (6), formed from a material having negligible net nuclear or electronic magnetic field; a set of data entities (4) embedded in said body, each having a plurality of magnetic field states; a set of probes (2), offset from the body, arranged to acquire internal phase shifts due to the magnetic fields of said data entities; wherein the probes (2) are each arranged to move relative to a plurality of data entities (4) in order that each probe (2) acquires an internal phase shift from the plurality of data entities (4); and means for reading each probe (2), thereby establishing a parity of the plurality of data entities (4).