A downsized variable inductor is disclosed. The downsized variable inductor includes: a magnetic core formed in a closed loop shape, and including an air gap portion formed by partially opening the closed loop shape; a gap core inserted and fixed to the air gap portion to be integral with the magnetic core, and served to increase an inductance and a maximum current at low current of the inductor, and a coil wound and connected to the magnetic core.

A variable circuit includes a switch including a plurality of input terminals and a plurality of output terminals and an external wiring line. The multiple input terminals include a first input terminal to which a first input signal is inputted and a second input terminal to which a second input signal is inputted. The multiple output terminals include a first output terminal from which a first output signal is outputted and a second output terminal from which a second output signal is outputted. The switch is capable of forming at least one internal connection path electrically connecting any one of the multiple input terminals and any one of the multiple output terminals. The external wiring line is disposed outside the switch and is configured to electrically connect the second output terminal to the second input terminal.

A variable circuit includes a switch including a plurality of input terminals and a plurality of output terminals and an external wiring line. The multiple input terminals include a first input terminal to which a first input signal is inputted and a second input terminal to which a second input signal is inputted. The multiple output terminals include a first output terminal from which a first output signal is outputted and a second output terminal from which a second output signal is outputted. The switch is capable of forming at least one internal connection path electrically connecting any one of the multiple input terminals and any one of the multiple output terminals. The external wiring line is disposed outside the switch and is configured to electrically connect the second output terminal to the second input terminal.

An isolator is configured by a transmission circuit, a transformer, and a reception circuit. A first coil of the transformer is disposed on a back surface of a first semiconductor substrate; a transmission circuit and a second coil of the transformer are disposed on a front surface. The first coil is embedded within a coil trench, is led out through an embedded via-metal-film to a substrate front surface, and is electrically connected to the transmission circuit. The second coil is disposed on an insulating layer of the substrate front surface. The reception circuit is disposed on a front surface of a second semiconductor substrate. The second coil and the reception circuit are electrically connected to each other by connecting first and third electrode pads disposed respectively on the front surfaces of the first and second semiconductor substrates through wires.

Disclosed in the present invention is an adjustable inductor, and a transmission circuit for magnetic resonance. The adjustable inductor comprises a fixing assembly, an inductance assembly and a sliding assembly. The inductance assembly is electrically connected to the fixing assembly. The sliding assembly is electrically connected to the fixing assembly and the inductance assembly, and is configured to be able to change the contact position with the inductance assembly so as to change the inductance value of the inductance assembly.

A superconducting integrated circuit is fabricated by depositing a ground plane to at least partially overlie a substrate, depositing an insulating layer to at least partially overlie the ground plane, depositing a superconducting layer to at least partially overlie the insulating layer, and forming a superconducting feature in the superconducting layer. An inductance of the superconducting feature is tunable by adjusting a bias current in the ground plane. The ground plane is electrically communicatively coupleable to an electrical ground. Depositing a ground plane includes depositing a first superconducting material to at least partially overlie the substrate and depositing a second superconducting material to at least partially overlie the first superconducting material. A second critical current density of the second superconducting material is higher than a first critical current density of the first superconducting material.

A superconducting integrated circuit is fabricated by depositing a ground plane to at least partially overlie a substrate, depositing an insulating layer to at least partially overlie the ground plane, depositing a superconducting layer to at least partially overlie the insulating layer, and forming a superconducting feature in the superconducting layer. An inductance of the superconducting feature is tunable by adjusting a bias current in the ground plane. The ground plane is electrically communicatively coupleable to an electrical ground. Depositing a ground plane includes depositing a first superconducting material to at least partially overlie the substrate and depositing a second superconducting material to at least partially overlie the first superconducting material. A second critical current density of the second superconducting material is higher than a first critical current density of the first superconducting material.