Patent classifications
H01G7/00
Flexible control systems and methods for device arrays
The present subject matter relates to devices, systems, and methods for controlling an array of two-state elements that can be independently positioned in either first state or a second state. A non-volatile memory in communication with the plurality of two-state elements is configured to receive an input digital control word that addresses a location within the non-volatile memory and to output one of a plurality of array control words stored at the location addressed within the memory to the plurality of two-state elements, wherein the array control word sets a predetermined combination of the plurality of two-state elements to be in the first state and in the second state, and wherein the predetermined combination of the plurality of two-state elements in the first state and in the second state optimally achieves a desired behavior of the array corresponding to the input digital control word.
Flexible control systems and methods for device arrays
The present subject matter relates to devices, systems, and methods for controlling an array of two-state elements that can be independently positioned in either first state or a second state. A non-volatile memory in communication with the plurality of two-state elements is configured to receive an input digital control word that addresses a location within the non-volatile memory and to output one of a plurality of array control words stored at the location addressed within the memory to the plurality of two-state elements, wherein the array control word sets a predetermined combination of the plurality of two-state elements to be in the first state and in the second state, and wherein the predetermined combination of the plurality of two-state elements in the first state and in the second state optimally achieves a desired behavior of the array corresponding to the input digital control word.
Layout techniques for transcap area optimization
Certain aspects of the present disclosure provide a semiconductor variable capacitor. The semiconductor variable capacitor generally includes a semiconductor region, an insulative layer disposed above the semiconductor region, and a first non-insulative region disposed above the insulative layer. In certain aspects, a second non-insulative region is disposed adjacent to the semiconductor region, and a control region is disposed adjacent to the semiconductor region such that a capacitance between the first non-insulative region and the second non-insulative region is configured to be adjusted by varying a control voltage applied to the control region. In certain aspects, the first non-insulative region is disposed above a first portion of the semiconductor region and a second portion of the semiconductor region, and the first portion and the second portion of the semiconductor region are disposed adjacent to a first side and a second side, respectively, of the control region or the second non-insulative region.
Layout techniques for transcap area optimization
Certain aspects of the present disclosure provide a semiconductor variable capacitor. The semiconductor variable capacitor generally includes a semiconductor region, an insulative layer disposed above the semiconductor region, and a first non-insulative region disposed above the insulative layer. In certain aspects, a second non-insulative region is disposed adjacent to the semiconductor region, and a control region is disposed adjacent to the semiconductor region such that a capacitance between the first non-insulative region and the second non-insulative region is configured to be adjusted by varying a control voltage applied to the control region. In certain aspects, the first non-insulative region is disposed above a first portion of the semiconductor region and a second portion of the semiconductor region, and the first portion and the second portion of the semiconductor region are disposed adjacent to a first side and a second side, respectively, of the control region or the second non-insulative region.
BST capacitor control
A circuit for controlling a capacitor having a capacitance adjustable by biasing, including an amplifier for delivering a D.C. bias voltage, having a feedback slowed down by a resistive and capacitive cell.
BST capacitor control
A circuit for controlling a capacitor having a capacitance adjustable by biasing, including an amplifier for delivering a D.C. bias voltage, having a feedback slowed down by a resistive and capacitive cell.
Attenuator and high frequency circuit
An attenuator includes a first high frequency signal input-output terminal and a second high frequency signal input-output terminal, a switch circuit, a plurality of resistors, and a variable capacitor. The plurality of resistors are respectively connected to the first high frequency signal input-output terminal while the resistors being parallel to each other. The switch circuit includes a plurality of selection target terminals respectively connected to the resistors and a shared terminal to which the plurality of selection target terminals are selectively connected and which is connected to the second high frequency signal input-output terminal. The variable capacitor is connected to one of the resistors in series and is so constituted as to have not a diode structure.
Attenuator and high frequency circuit
An attenuator includes a first high frequency signal input-output terminal and a second high frequency signal input-output terminal, a switch circuit, a plurality of resistors, and a variable capacitor. The plurality of resistors are respectively connected to the first high frequency signal input-output terminal while the resistors being parallel to each other. The switch circuit includes a plurality of selection target terminals respectively connected to the resistors and a shared terminal to which the plurality of selection target terminals are selectively connected and which is connected to the second high frequency signal input-output terminal. The variable capacitor is connected to one of the resistors in series and is so constituted as to have not a diode structure.
Methods and Apparatuses for Use in Tuning Reactance in a Circuit Device
Methods and apparatuses for use in tuning reactance are described. Open loop and closed loop control for tuning of reactances are also described. Tunable inductors and/or tunable capacitors may be used in filters, resonant circuits, matching networks, and phase shifters. Ability to control inductance and/or capacitance in a circuit leads to flexibility in operation of the circuit, since the circuit may be tuned to operate under a range of different operating frequencies.
Methods and Apparatuses for Use in Tuning Reactance in a Circuit Device
Methods and apparatuses for use in tuning reactance are described. Open loop and closed loop control for tuning of reactances are also described. Tunable inductors and/or tunable capacitors may be used in filters, resonant circuits, matching networks, and phase shifters. Ability to control inductance and/or capacitance in a circuit leads to flexibility in operation of the circuit, since the circuit may be tuned to operate under a range of different operating frequencies.