H01G7/00

NONVOLATILE TUNABLE CAPACITIVE PROCESSING UNIT
20220320428 · 2022-10-06 ·

In an approach for forming a nonvolatile tunable capacitor device, a first electrode layer is formed distally opposed from a second electrode layer, the first electrode layer configured to make a first electrical connection and the second electrode layer configured to make a second electrical connection. A dielectric layer is posited between the first electrode layer and adjacent to the second electrode layer. A phase change material (PCM) layer is posited between the first electrode layer and the second electrode layer adjacent to the dielectric layer. An energizing component is provided to heat the PCM layer to change a phase of the PCM layer. The energizing component may include a heating element or electrical probe in direct contact with the PCM layer, that when energized is configured to apply heat to the PCM layer. The phase of the PCM layer is changeable between an amorphous phase and a crystalline phase.

SYSTEMS AND METHODS FOR CALIBRATING A TUNABLE COMPONENT

Systems, devices, and methods for adjusting tuning settings of tunable components, such as tunable capacitors, can be configured for calibrating a tunable component. Specifically, the systems, devices and methods can measure a device response for one or more inputs to a tunable component, store a calibration code in a non-volatile memory that characterizes the device response of the tunable component, and adjust a tuning setting of the tunable component based on the calibration code to achieve a desired response of the tunable component.

SYSTEMS AND METHODS FOR CALIBRATING A TUNABLE COMPONENT

Systems, devices, and methods for adjusting tuning settings of tunable components, such as tunable capacitors, can be configured for calibrating a tunable component. Specifically, the systems, devices and methods can measure a device response for one or more inputs to a tunable component, store a calibration code in a non-volatile memory that characterizes the device response of the tunable component, and adjust a tuning setting of the tunable component based on the calibration code to achieve a desired response of the tunable component.

RF IMPEDANCE MATCHING NETWORK
20220084791 · 2022-03-17 ·

In one embodiment, an RF impedance matching circuit is disclosed. The matching circuit is coupled between a plasma chamber and an RF source. The matching circuit includes a first electronically variable capacitor (EVC) having a first variable capacitance, a terminal of the first EVC being operably coupled to the RF input, and a second EVC having a second variable capacitance, a terminal of the second EVC being operably coupled to the RF output. A control circuit determines, based on a first parameter, a first capacitance value for the first EVC and a second capacitance value for the second EVC. The control circuit then generates a control signal to alter the first and second variable capacitances accordingly. The alteration of the capacitances, while the frequency of the RF source is not altered, causes RF power reflected back to the RF source to decrease.

RF IMPEDANCE MATCHING NETWORK
20220084791 · 2022-03-17 ·

In one embodiment, an RF impedance matching circuit is disclosed. The matching circuit is coupled between a plasma chamber and an RF source. The matching circuit includes a first electronically variable capacitor (EVC) having a first variable capacitance, a terminal of the first EVC being operably coupled to the RF input, and a second EVC having a second variable capacitance, a terminal of the second EVC being operably coupled to the RF output. A control circuit determines, based on a first parameter, a first capacitance value for the first EVC and a second capacitance value for the second EVC. The control circuit then generates a control signal to alter the first and second variable capacitances accordingly. The alteration of the capacitances, while the frequency of the RF source is not altered, causes RF power reflected back to the RF source to decrease.

Method of forming a sputtering target

Aspects of the subject disclosure may include, for example, a method in which a selection is made for a first major constituent, a second major constituent and a minor constituent for forming a desired material. The method can include mixing the first major constituent, the second major constituent and the minor constituent in a single mixing step to provide a mixture of constituents. The method can include drying the mixture of constituents to provide a dried mixture of constituents and calcining the dried mixture of constituents to provide a calcinated mixture of constituents. The method can include processing the calcinated mixture of constituents (by a process including vacuum annealing and hot-pressing) to provide a sputtering target. Other embodiments are disclosed.

VARIABLE CAPACITOR
20210336069 · 2021-10-28 ·

A variable capacitor includes a semiconductor substrate, a well region, and a gate electrode. The well region is disposed in the semiconductor substrate. The gate electrode is disposed on the semiconductor substrate, and the gate electrode overlaps a part of the well region in a thickness direction of the semiconductor substrate. A conductivity type of the gate electrode is complementary to a conductivity type of the well region for improving electrical performance of the variable capacitor.

VARIABLE CAPACITOR
20210336069 · 2021-10-28 ·

A variable capacitor includes a semiconductor substrate, a well region, and a gate electrode. The well region is disposed in the semiconductor substrate. The gate electrode is disposed on the semiconductor substrate, and the gate electrode overlaps a part of the well region in a thickness direction of the semiconductor substrate. A conductivity type of the gate electrode is complementary to a conductivity type of the well region for improving electrical performance of the variable capacitor.

Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals

Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals are described. Such devices and method include use of symmetrical compensation capacitances, symmetrical series capacitors, or symmetrical sizing of the elements of the stack.

Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals

Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals are described. Such devices and method include use of symmetrical compensation capacitances, symmetrical series capacitors, or symmetrical sizing of the elements of the stack.