A display apparatus including: a plurality of display modules, each including a substrate and inorganic light emitting diodes mounted on a mounting surface of the substrate; a cover layer configured to cover the mounting surface of each of the display modules; and an adhesive layer arranged between the cover layer and the mounting surface of each of the display modules to cause the cover layer to adhere to the mounting surface of each of the display modules, wherein the adhesive layer includes a first region, disposed on a gap formed between the plurality of display modules, and a second region disposed on the mounting surface of each of the display modules, and wherein the adhesive layer includes a photosensitive material such that the first region of the adhesive layer is configured to undergo a photosensitive reaction based on an external light source.

A semiconductor nanocrystal particle including a core including a first semiconductor nanocrystal including zinc (Zn) and sulfur (S), selenium (Se), tellurium (Te), or a combination thereof; and a shell including a second semiconductor nanocrystal disposed on at least a portion of the core, wherein the core includes a dopant of a Group 1A element, a Group 2A element, or a combination thereof, and the semiconductor nanocrystal particle exhibits a maximum peak emission in a wavelength region of about 440 nanometers (nm) to about 470 nm.

Herein disclosed are a wafer, a wafer testing system, and a method thereof. Said wafer testing method comprises the following steps. First, an incident light is provided toward a wafer. And, a wafer surface image corresponded to the wafer is generated. Then, determining whether the wafer surface image has a plurality of first strips and a plurality of second strips, and the plurality of first strips and the plurality of second strips are symmetrical. When the wafer surface image has the plurality of first strips and the plurality of second strips, and the plurality of first strips and the plurality of second strips are symmetrical, a qualified signal corresponded to the wafer is provided.

An optoelectronic device and a manufacturing method thereof are provided. The optoelectronic device includes a substrate, light emitting chips disposed on the substrate and electrically connected to the substrate, a first annular structure disposed on the substrate and around the light emitting chips, a first wavelength conversion layer disposed in the first annular structure and covering the light emitting chips, a second annular structure disposed on the substrate and around the light emitting chips and further being in contact with the first annular structure, and a second wavelength conversion layer disposed in the second annular structure and covering the first wavelength conversion layer and the light emitting chips. Wavelength conversion substances contained in the first wavelength conversion layer and the second wavelength conversion layer respectively are different in material. Therefore, the optoelectronic device can achieve improved uniformity of luminescence as well as light output quality.

A display apparatus is provided. The display apparatus includes a substrate, a transistor, a metal layer, and a light-emitting diode. The transistor is disposed on the substrate. The metal layer is disposed on the transistor and electrically connected to the transistor, wherein a first distance is between the upper surface of the metal layer and the substrate in a direction perpendicular to the substrate. The light-emitting diode is disposed on the metal layer, wherein the light-emitting diode includes a light-emitting diode body and an electrode, the light-emitting diode body is electrically connected to the metal layer via the electrode, the light-emitting diode body has a first surface and a second surface opposite to the first surface, the first surface and the second surface are parallel to the substrate, and in the direction above, a second distance is between the first surface and the second surface, wherein the ratio of the second distance to the first distance is greater than or equal to 0.25 and less than or equal to 6.

Disclosed are a method of manufacturing a microstructure array that includes preparing a mold having a concave micro pattern array in which a plurality of concave micro patterns are arranged, preparing a perovskite precursor solution including a perovskite precursor and a hydrophilic polymer, coating the perovskite precursor solution on a substrate, disposing the mold on the perovskite precursor solution to confine the perovskite precursor solution in the plurality of concave micro patterns, obtaining a composite of perovskite nanocrystals and the hydrophilic polymer from the perovskite precursor solution in the plurality of concave micro patterns, and, and removing the mold to form a microstructure array in which a plurality of microstructures including a composite of the perovskite nanocrystals and the hydrophilic polymer are arranged, a microstructure array, a micro light emitting diode including the same, and a manufacturing method thereof, and a display device.

Direct-bonded LED arrays and applications are provided. An example process fabricates a LED structure that includes coplanar electrical contacts for p-type and n-type semiconductors of the LED structure on a flat bonding interface surface of the LED structure. The coplanar electrical contacts of the flat bonding interface surface are direct-bonded to electrical contacts of a driver circuit for the LED structure. In a wafer-level process, micro-LED structures are fabricated on a first wafer, including coplanar electrical contacts for p-type and n-type semiconductors of the LED structures on the flat bonding interface surfaces of the wafer. At least the coplanar electrical contacts of the flat bonding interface are direct-bonded to electrical contacts of CMOS driver circuits on a second wafer. The process provides a transparent and flexible micro-LED array display, with each micro-LED structure having an illumination area approximately the size of a pixel or a smallest controllable element of an image represented on a high-resolution video display.

A method includes: introducing a gas including gallium, an ammonia gas, and a gas including a p-type impurity to a reactor and forming a first p-type nitride semiconductor layer on a first light-emitting layer in a state in which the reactor has been heated to a first temperature; lowering a temperature of the reactor from the first temperature to a second temperature; introducing an ammonia gas with a first flow rate to the reactor and increasing the temperature of the reactor from the second temperature to a third temperature; and introducing a gas including gallium, an ammonia gas with a second flow rate, and a gas including an n-type impurity to the reactor, and forming a second n-type nitride semiconductor layer on the first p-type nitride semiconductor layer in a state in which the reactor has been heated to the third temperature.

Described are light emitting diode (LED) devices comprising a plurality of mesas defining pixels, each of the mesas comprising semiconductor layers, an N-contact material in a space between each of the plurality of mesas, a dielectric material which insulates sidewalls of the P-type layer and the active region from the metal. A hard mask layer is above the semiconductor layers, the hard mask layer having a plurality of openings therein, each partially filled with a liner layer and partially filled with a P-metal material plug, the P-metal material plug having a width; and a passivation film is on the hard mask layer, the passivation film having a plurality of passivation film openings therein defining a width, the width of each passivation film opening being less than the width of a combination of the P-metal material plug and the liner layer.

A light emitting diode (LED) structure includes a semiconductor template having a template top-surface, an active quantum well (QW) structure formed over the semiconductor template, and a p-type layer. The p-type layer has a bottom-surface that faces the active QW and the template top-surface. The bottom-surface includes a recess sidewall. The recess sidewall of the p-type layer is configured for promoting injection of holes into the active QW structure through a QW sidewall of the active QW structure.