Patent classifications
H01S2304/00
METHOD FOR FABRICATING SURFACE EMITTING LASER
A method for fabricating a surface emitting laser includes the steps of: carrying out etching of a semiconductor laminate with a mask; and stopping the etching in response to a detection signal from an end point detector in an etching apparatus. The mask has a device area including device sections and an accessary area. The device area has an aperture ratio (OPD/SC) having a first value, the aperture ratio (OPD/SC) being defined as a total area (OPD) of an opening in each device section to an area (SC) of the device section. The accessary area has an aperture ratio having a second value configured to have substantially the same value as the first value, the aperture ratio of the accessary area being defined as an area of the opening pattern in a portion having an area, which is equal to the area of the device section, in the accessary area.
Method for preparing ER- or ER/O-doped silicon-based luminescent material emitting communication band at room temperature, the luminescent material and ER- or ER/O-SI lasers
A method for preparing an erbium (Er)- or erbium oxygen (Er/O)-doped silicon-based luminescent material emitting a communication band at room temperature. The method comprising the following steps: (a) doping a single crystalline silicon wafer with erbium ion implantation or co-doping the single crystalline silicon wafer with erbium ion and oxygen ion implantation simultaneously to obtain an Er- or Er/O-doped silicon wafer, wherein the single crystalline silicon wafer is a silicon wafer with a germanium epitaxial layer, or an SOI silicon wafer with silicon on an insulating layer or other silicon-based wafers; and (b) subjecting the Er- or Er/O-doped silicon wafer to a deep-cooling annealing treatment, the deep-cooling annealing treatment includes a temperature increasing process and a rapid cooling process.
NITRIDE-BASED SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND MANUFACTURING METHOD THEREOF, AND MANUFACTURING METHOD OF NITRIDE-BASED SEMICONDUCTOR CRYSTAL
A manufacturing method of a nitride-based semiconductor light-emitting element includes: forming an n-type nitride-based semiconductor layer; forming, on the n-type nitride-based semiconductor layer, a light emission layer including a nitride-based semiconductor; forming, on the light emission layer in an atmosphere containing a hydrogen gas, a p-type nitride-based semiconductor layer while doping the p-type nitride-based semiconductor layer with a p-type dopant at a concentration of at least 2.0×10.sup.18 atom/cm.sup.3; and annealing the p-type nitride-based semiconductor layer at a temperature of at least 800 degrees Celsius in an atmosphere not containing hydrogen. In this manufacturing method, a hydrogen concentration of the p-type nitride-based semiconductor layer after the annealing is at most 5.0×10.sup.18 atom/cm.sup.3 and at most 5% of the concentration of the p-type dopant, and a hydrogen concentration of the light emission layer is at most 2.0×10.sup.17 atom/cm.sup.3.
Nitride semiconductor light-emitting element, method for manufacturing nitride semiconductor light-emitting element, and nitride semiconductor light-emitting device
In a method for manufacturing a nitride semiconductor light-emitting element by splitting a semiconductor layer stacked substrate including a semiconductor layer stacked body with a plurality of waveguides extending along the Y-axis to fabricate a bar-shaped substrate, and splitting the bar-shaped substrate along a lengthwise split line to fabricate an individual element, the waveguide in the individual element has different widths at one end portion and the other end portion and the center line of the waveguide is located off the center of the individual element along the X-axis, and in the semiconductor layer stacked substrate including a first element forming region and a second element forming region which are adjacent to each other along the X-axis, two lengthwise split lines sandwiching the first element forming region and two lengthwise split lines sandwiching the second element forming region are misaligned along the X-axis.
Light-emitting device, method for manufacturing the same, and projector
A light-emitting device includes: a substrate; a laminated structure provided at the substrate and having a plurality of columnar parts; and an electrode provided on a side opposite to a side of the substrate, of the laminated structure. The columnar part has: a first semiconductor layer; a second semiconductor layer having a different electrical conductivity type from the first semiconductor layer; and an active layer provided between the first semiconductor layer and the second semiconductor layer. The laminated structure has: a light propagation layer provided between the active layers of the columnar parts that are next to each other; a first low-refractive-index part provided between the light propagation layer and the substrate and having a lower refractive index than a refractive index of the light propagation layer; and a second low-refractive-index part provided between the light propagation layer and the electrode and having a lower refractive index than the refractive index of the light propagation layer.
LASER DIODES, LEDS, AND SILICON INTEGRATED SENSORS ON PATTERNED SUBSTRATES
The present disclosure falls into the field of optoelectronics, particularly, includes the design, epitaxial growth, fabrication, and characterization of Laser Diodes (LDs) operating in the ultraviolet (UV) to infrared (IR) spectral regime on patterned substrates (PSs) made with (formed on) low cost, large size Si, or GaN on sapphire, GaN, and other wafers. We disclose three types of PSs, which can be universal substrates, allowing any materials (III-Vs, II-VIs, etc.) grown on top of it with low defect and/or dislocation density.
Moisture control in oxide-confined vertical cavity surface-emitting lasers
A fabrication sequence for an oxide-confined VCSEL includes the deposition of a protective coating over exposed horizontal surfaces to prevent unwanted oxide layers from being formed during the lateral oxidation process used to create the oxide aperture. By preventing the oxidation of these surfaces in the first instance, the opportunity for moisture to gain access to the active region of the VCSEL is eliminated. For example, exposed Al-containing surfaces are covered with a protective coating of dielectric material prior to initiating the conventional lateral oxidation process used to form the oxide aperture of the VCSEL. With the protective coating in place, a conventional fabrication process is resumed, and the protective coating ultimately forms part of the passivation layer used to provide electrical isolation for the final VCSEL device.
METHOD OF TRANSFERRING A PATTERN TO AN EPITAXIAL LAYER OF A LIGHT EMITTING DEVICE
Light emitting devices having light extraction or guiding structures integrated in their epitaxial layers, wherein the light extraction and guiding structures are fabricated using a lateral epitaxial growth technique that transfers a pattern from a growth restrict mask and/or host substrate to the epitaxial layers.
Semiconductor laser wafer and semiconductor laser
A semiconductor laser wafer includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, and a composition evaluation layer. The active layer is provided on the first semiconductor layer; multiple periods of pairs of a light-emitting multi-quantum well region and an injection multi-quantum well region are stacked in the active layer; the light-emitting multi-quantum well region is made of a first compound semiconductor and a second compound semiconductor. The second semiconductor layer is provided on the active layer. The composition evaluation layer is provided above the active layer and includes a first film and a second film; the first film is made of the first compound semiconductor and has a first thickness; and the second film is made of the second compound semiconductor and has a second thickness.
EPITAXIAL GROWTH ON A GALLIUM ARSENIDE PHOSPHIDE CAPPED MATERIAL ON A GALLIUM ARSENIDE SUBSTRATE
A semiconductor device fabrication method in which a growing process is followed by a capping process in which a phosphor containing material cap layer is deposited over a final GaAs based layer. The wafer, containing many such substrates, can be removed from the reaction chamber to continue processing at a later time without creating an oxide layer on the final GaAs based layer. In continuing processing, a decomposition process selectively decomposes the phosphor containing material cap layer, after which a regrowing process is performed to grow additional layers of the device structure. The capping, decomposition and regrowth processes can be repeated multiple times on the semiconductor devices on the wafer during device fabrication.