A device may include a substrate and an active region. This active region may include a stack of semiconductor gain materials stacked along a stacking direction. The latter may extend substantially perpendicular to a plane of the substrate. The active region may be furthermore tapered so as to widen toward the substrate. In addition, the device may include a pair of doped layers semiconductor materials, the pair may include an n-doped layer and a p-doped layer arranged on the substrate and on opposite. The doped layers may be arranged on the substrate and on opposite, lateral sides of the tapered active region, respectively. The device may include an electron blocking layer, which may extend both at a first interface, between a p-doped layer and the substrate, and at a second interface, between the tapered active region and the p-doped layer, along a lateral side of the tapered active region.

An embodiment discloses a vertical cavity surface emitting laser and a method for manufacturing the same, the vertical cavity surface emitting laser comprising: a substrate; a lower reflective layer disposed on the substrate; an active layer disposed on the lower reflective layer; an oxide layer disposed on the active layer and comprising a first hole disposed at the center thereof; a capping layer disposed on the oxide layer; and an upper reflective layer disposed on the capping layer and the first hole.

An ultralow defect gallium-containing nitride crystal and methods of making ultralow defect gallium-containing nitride crystals are disclosed. The crystals are useful as substrates for light emitting diodes, laser diodes, transistors, photodetectors, solar cells, and photoelectrochemical water splitting for hydrogen generators.

A device may include a substrate and an active region. This active region may include a stack of semiconductor gain materials stacked along a stacking direction. The latter may extend substantially perpendicular to a plane of the substrate. The active region may be furthermore tapered so as to widen toward the substrate. In addition, the device may include a pair of doped layers semiconductor materials, the pair may include an n-doped layer and a p-doped layer arranged on the substrate and on opposite. The doped layers may be arranged on the substrate and on opposite, lateral sides of the tapered active region, respectively. The device may include an electron blocking layer, which may extend both at a first interface, between a p-doped layer and the substrate, and at a second interface, between the tapered active region and the p-doped layer, along a lateral side of the tapered active region.

Provided is a tunable laser device. The tunable laser device includes a lower clad layer, first to third quantum well patterns disposed on the lower clad layer and arranged in a first direction parallel to a top surface of the lower clad layer, an upper clad layer disposed on the first quantum well pattern, and first grating patterns disposed between the third quantum well pattern and the lower clad layer. The first to third quantum well patterns are arranged in the first direction parallel to a top surface of the lower clad layer, the upper clad layer includes a p-type conductive clad layer, the upper clad layer includes an n-type conductive clad layer, and the third quantum well pattern is electrically intrinsic. When a reverse bias is applied to the upper clad layer, the third quantum well pattern, and the lower clad layer, the third quantum well pattern is changed in refractive index.

Patterned substrates and optoelectronic devices (UV laser diode, UV LED, and sensors grown on silicon substrate) formed on these patterned substrates are described. The method of making patterned substrates are described. Examples of making laser diodes on these patterned substrates described in detail. The PSs can be fabricated by either combination of e-beam lithography and wet-chemical etching or combination of e-beam lithography and dry etching or through Nanoimprint transfer of master mold patterns to various wafers followed by etching.

A method for fabrication of three-dimensional nanostructures on top of the surface of a first solid state material is disclosed, which includes steps of (i) deposition of a layer of a second solid state material forming a stable layer-like coverage of the surface, (ii) the subsequent deposition of a third solid state material, having a stronger binding energy with the first solid state material than the second solid state material, (iii) wherein the third solid state material replaces the second solid state material forming an interface with the first material and thus reduces the energy of the system, and (iv) where the resulting excess second solid state material forms three-dimensional nanostructures. The structure can be covered with another (fourth) solid state material, which eventually can be the same as the first material or a different one, and the three dimensional nanostructures form capped quantum dots or quantum wires. The deposition steps can be repeated and extended to provide necessary functionality in the resulting device structure.

A method for fabricating a nanostructure comprises the steps of growing a first nanowire on a substrate, forming a dielectric layer on the substrate, the dielectric layer surrounding the first nanowire, wherein a thickness of the dielectric layer is smal- ler than a length of the first nanowire, and removing the first nanowire from the dielectric layer, thereby exposing an aperture in the dielectric layer.

A method for fabrication of three-dimensional nanostructures on top of the surface of a first solid state material is disclosed, which includes steps of (i) deposition of a layer of a second solid state material forming a stable layer-like coverage of the surface, (ii) the subsequent deposition of a third solid state material, having a stronger binding energy with the first solid state material than the second solid state material, (iii) wherein the third solid state material replaces the second solid state material forming an interface with the first material and thus reduces the energy of the system, and (iv) where the resulting excess second solid state material forms three-dimensional nanostructures. The structure can be covered with another (fourth) solid state material, which eventually can be the same as the first material or a different one, and the three dimensional nanostructures form capped quantum dots or quantum wires. The deposition steps can be repeated and extended to provide necessary functionality in the resulting device structure.

A manufacturing method of a nitride-based semiconductor light-emitting element includes: forming an n-type nitride-based semiconductor layer; forming, on the n-type nitride-based semiconductor layer, a light emission layer including a nitride-based semiconductor; forming, on the light emission layer in an atmosphere containing a hydrogen gas, a p-type nitride-based semiconductor layer while doping the p-type nitride-based semiconductor layer with a p-type dopant at a concentration of at least 2.0?10.sup.18 atom/cm.sup.3; and annealing the p-type nitride-based semiconductor layer at a temperature of at least 800 degrees Celsius in an atmosphere not containing hydrogen. In this manufacturing method, a hydrogen concentration of the p-type nitride-based semiconductor layer after the annealing is at most 5.0?10.sup.18 atom/cm.sup.3 and at most 5% of the concentration of the p-type dopant, and a hydrogen concentration of the light emission layer is at most 2.0?10.sup.17 atom/cm.sup.3.