Patent classifications
H02H1/00
SWITCH CONTROL CIRCUIT, UNIVERSAL SERIAL BUS CONTROL CIRCUIT, AND METHOD FOR CONTROLLING A POWER SWITCH THEREOF
A switch control circuit includes a power switch, a first protection unit, and a second protection unit. The power switch has a first terminal coupled to a first voltage terminal for receiving a first voltage, a second terminal coupled to a second voltage terminal for receiving a second voltage, and a control terminal receives a control voltage. In a first mode, the control voltage is greater than the first voltage. In a second mode, when a voltage of the second voltage terminal is smaller than a first reference voltage, the first protection unit pulls down the control voltage to reduce a current flowing through the power switch. When the voltage of the second voltage terminal is smaller than the second reference voltage, the second protection unit pulls down the control voltage to a ground voltage.
FUSE CLEARING APPARATUS FOR MEDIUM-VOLTAGE SUBSTATION APPLICATIONS
An apparatus includes at least one fuse clearing switch operable to create a fault on at least one AC line between a fuse and a transformer of a substation. The apparatus further includes a control system configured to be coupled to an arc detector and to operate the at least one fuse clearing switch responsive to a control signal produced by the arc detector.
ELECTROSTATIC DISCHARGE CIRCUIT AND METHOD OF OPERATING SAME
An electrostatic discharge (ESD) circuit includes an ESD detection circuit, a clamp circuit and an ESD assist circuit. The ESD detection circuit is coupled between a first and a second node. The first node has a first voltage. The second node has a second voltage. The clamp circuit includes a first transistor having a first gate, a first drain, a first source and a first body terminal. The first gate is coupled to at least the ESD detection circuit by a third node. The first drain is coupled to the second node. The first source and the first body terminal are coupled together at the first node. The ESD assist circuit is coupled between the first node and the third node, and is configured to clamp a third voltage of the third node at the first voltage during an ESD event at the first node or the second node.
System and a method for protecting a regulator rectifier device and a respective protection device
The problem to be solved is to provide a system and a method to protect the regulator rectifiers from the reverse voltage condition and the short circuit condition, and the problem is solved in the present invention by a system and a method that use a protection device including a control unit that receives an input from the circuit based on the reverse voltage condition and the short circuit condition, and based on the existence of at least one of the condition or a combination thereof, the control unit switches a switching unit from an ON state to an OFF state, thereby breaking the circuit between the regulator rectifier device and the load section, thus protecting the regulator rectifier device.
Tie switch restoration
A control system and method for a group of interconnected feeders which enables fault location, isolation and service restoration without requiring each switch to have topology knowledge of devices in adjacent feeders. The method defines, for each switch, connectivity and X/Y directional information about its neighboring switches and propagates this information throughout each feeder. A leader device is also determined for each feeder. Information about topology of adjacent feeders is not needed by all devices. Only normally-open tie switches which define a boundary between two adjacent feeders have knowledge of the devices in both feeders. Switches which open during fault isolation automatically find open tie switches in a direction opposite the fault, and request service restoration downstream of the fault by providing power from an adjacent feeder. Leader devices ensure an overload condition is not created before initiating opening and closing operations of switches downstream of the fault.
Triggering circuit and electronic fuse device incorporating the same
A triggering circuit and an electronic fuse device incorporating the same. The triggering circuit works with a microcontroller to control a load. The microcontroller has a low-power mode and an external interrupt input for triggering wakeup from the low-power mode and initiating an interrupt action related to the load. The triggering circuit comprises a sensor input for receiving a sensor signal related to the load, a threshold input for receiving a threshold reference signal, and a comparator for comparing the sensor signal to the threshold reference signal and for outputting an interrupt signal to the external interrupt input in response to the comparison.
Electrostatic discharge clamp topology
A clamping circuit comprises a first field-effect transistor (FET) having a gate, a source, and a drain, a diode, a first voltage source, and coupling circuitry configured to couple the first voltage source to the drain of the first FET and the diode to the source of the first FET.
TIME SYNCHRONIZATION BETWEEN IEDS OF DIFFERENT SUBSTATIONS
There is provided mechanisms for time-synchronized communication of packets between a first substation and a second substation interconnected by a communication channel. Samples obtained within the second substation are provided with time information associated with a common reference clock and sent to the first substation, at which a time-wise synchronization of the received samples with samples obtained within the first substation is performed by means of the time information and a time difference between the common reference clock and a local reference clock of the first substation.
METHOD OF AND SYSTEM FOR DETECTING A SERIAL ARC FAULT IN A POWER CIRCUIT
A method of detecting a serial arc fault in a DC-power circuit includes injecting an RF-signal with a narrow band-width into the DC-power circuit and measuring a response signal related to the injected RF-signal in the DC-power circuit. The method further includes determining a time derivative of the response signal, analyzing the time derivative, and signaling an occurrence of a serial arc fault in the power circuit based on the results of the analysis. A system for detecting an arc fault is configured to perform a method as described before.
Method for detecting accidental arcs during the charging of electrical battery systems
A method for detecting arc faults when charging electric battery systems or lead acid batteries, which are electrically connected in series to form a string which is supplied via a DC voltage converter. A first value corresponding to an electric voltage applied to the string and a second value corresponding to an electric current flowing through the string are generated. As a first condition, it is checked whether the first value changes by more than a first limit value within a first time window. As the second condition, it is checked whether the second value changes by more than a second limit value within a second time window. An arc is detected if the first condition and the second condition are met within a third time window. Provided also is a method for manufacturing electric battery systems, in particular lead acid batteries, as well as to a cut-off device.