Patent classifications
H02H1/00
GFCI test monitor circuit
A circuit interrupting device including a fault detection circuit and an auto-monitoring circuit. The fault detection circuit is configured to output a pre-trigger signal, wherein the pre-trigger signal is configured to not place the circuit interrupting device in a tripped condition. The auto-monitoring circuit is configured to monitor an auto-monitoring input signal, wherein the value of the auto-monitoring signal is at least partially determined by a value of a pre-trigger signal generated.
Detecting electrical arcing in household electrical wiring
Various embodiments disclosed herein provide techniques for detecting electrical arcing in an electrical system. A powerline communications (PLC) application executing on a network communications device acquires, via a PLC modem, first voltage readings associated with an electrical circuit. The PLC application performs one or more operations based on the first voltage readings to determine that an electrical arcing condition is present within the electrical circuit. The PLC application performs a remedial operation in response to determining that the electrical arcing condition is present.
Tee arrester with directional venting
A surge arrester device comprising a first housing portion including a first end and a second end, the first end including a first opening and the second end including a second opening. The device includes a first axis parallel to the first housing portion, the first axis intersecting a first center of the first opening and a second center of the second opening, and a second axis perpendicular to the first housing portion, the second axis intersecting an intermediate section of the first housing portion. The device includes a second housing portion protruding from the intermediate section of the first housing portion, the second housing portion protruding at an angle between the first axis and the second axis, and a metal oxide varistor (MOV) stack within the second housing portion, wherein the MOV stack is released through an opening of the second housing portion if the arrester faults to ground.
Method for processing direct current electric arc and apparatus
A method for processing a direct current electric arc and an apparatus, includes: obtaining a first current which is a direct current input current of a direct current cable of a photovoltaic cell system; obtaining a second current, where the second current is a direct current common mode current of a direct current cable or an alternating current common mode current of an alternating current cable; calculating a correlation coefficient between a frequency domain component of the first current and a frequency domain component of the second current; and when determining that the first current meets an electric arc occurrence condition and the correlation coefficient is greater than or equal to a preset coefficient threshold, skipping sending a direct current electric arc fault alarm. The correlation coefficient is used to reflect a proportion of common mode noise generated by the second current, and the preset coefficient threshold is set.
Systems and methods for auxiliary power dropout protection
The disclosure features circuits and methods for protecting transistors of a wireless power receiver, which can be controlled by gate drivers powered by an auxiliary power source. The circuit can include a comparator configured to generate a signal indicating a comparison of a value of the auxiliary power source to a predetermined threshold, and a fault latch coupled to the comparator. The fault latch can be configured to trigger based on the generated signal and transmit a signal to respective inputs of the gate drivers to cause a latched-on state of respective gates of the transistors. Switches respectively coupled to the gate drivers can be configured to disconnect respective outputs of the gate drivers from the respective transistor gates. Gate hold-up circuits respectively coupled to the respective transistor gates can be configured to maintain the latched-on state of the respective transistor gates for a period of time.
Performance three-phase ground fault circuit interrupter
Devices herein may include conductor lines connected between a power supply and load, each of the conductor lines coupled to an AC contactor and a contactor control circuit, wherein the contactor control circuit is operable to open and close one or more contactors of the AC contactor. The devices may further include a current transformer coupled to the conductor lines, the current transformer operable to output a secondary current corresponding to a primary current magnitude of an electrical current not flowing to the load, wherein the AC contactor is connected between the power supply and the load. Devices may further include a zero cross detection circuit operable to generate an interrupt at each of a plurality of zero crossings for a microprocessor, and determine whether to open the one or more contactors of the AC contactor in a predetermined optimum interval calculated with respect to the zero crossing points.
Performance Three-Phase Ground Fault Circuit Interrupter
Devices herein may include conductor lines connected between a power supply and load, each of the conductor lines coupled to an AC contactor and a contactor control circuit, wherein the contactor control circuit is operable to open and close one or more contactors of the AC contactor. The devices may further include a current transformer coupled to the conductor lines, the current transformer operable to output a secondary current corresponding to a primary current magnitude of an electrical current not flowing to the load, wherein the AC contactor is connected between the power supply and the load. Devices may further include a zero cross detection circuit operable to generate an interrupt at each of a plurality of zero crossings for a microprocessor, and determine whether to open the one or more contactors of the AC contactor in a predetermined optimum interval calculated with respect to the zero crossing points.
Managing outage detections and reporting
Systems and methods are disclosed for detecting node outages in a mesh network. A tracking node in the mesh network detects a set of signals originating from a tracked node in the mesh network. The set of signals includes beacons and communication messages transmitted by the tracked node. The tracking node determines that a threshold number of the alive beacon intervals have passed since receiving a most recent signal from the tracked node. The tracking node then outputs a ping to the tracked node requesting a response to the ping. When the response to the ping is not received from the tracked node, the tracking node transmits an outage alarm message to a next topologically higher layer of the mesh network, the outage alarm message comprising an identification of the tracked node.
RESIDUAL CURRENT CIRCUIT BREAKER
The present invention relates to a residual current circuit breaker, RCCB, (100) for an electrical circuit (300). The RCCB comprises a first switching device (106) and a second switching device (140) coupled in series with each other between the power supply (302) and the load (304). The first switching device (106) is configured to switch into an OFF mode, in which no current is fed to the load (304), upon detecting that a value of a current i fed to the load (304) is larger than a switching current is of the first switching device (106). The second switching device (140) is configured to switch into an ON mode, in which the load (304) is short cut, upon detecting a leakage of the current i fed to the load (304). Thereby, a novel RCCB architecture is provided. When a current leakage is detected a short cut is introduced which means that the voltage will be zero over the load and no person will be harmed by the current in the circuit. Flowever, when the load is short cut there will be a current rush in the circuit which will trigger the first switching device to break the circuit and no current will thereafter flow in the circuit. The invention also relates to a circuit comprising such a residual current circuit breaker and a corresponding method.
MACHINE LEARNING BASED METHOD AND DEVICE FOR DISTURBANCE CLASSIFICATION IN A POWER TRANSMISSION LINE
The present specification provides a method and device for determining a disturbance condition in a power transmission line. The method includes obtaining (302) a plurality of sample values corresponding to an electrical parameter measured in each phase. The method further includes determining (304) a plurality of magnitudes of the electrical parameter corresponding to each phase based on the corresponding plurality of sample values and determining (306) a plurality of difference values for each phase based on the corresponding plurality of magnitudes. The method includes processing (308) the plurality of difference values using a machine learning technique to determine the disturbance condition. The disturbance condition is one of a load change condition, a power swing condition and an electrical fault condition. The method also includes performing (310) at least one of a protection function and a control function based on the disturbance condition.