A current-limiting and power-flow control device according to the present invention includes a superconducting current-limiting element including a superconductor, a series capacitor, and a parallel circuit. The series capacitor is connected in series with the superconducting current-limiting element. The parallel circuit includes a reactor connected in parallel with a series circuit including the superconducting current-limiting element and the series capacitor. Accordingly, overcurrent at the time of occurrence of a fault causes transition of the superconductor of the superconducting current-limiting element to the normal conducting state, and thus causes autonomous current-limiting operation of the superconducting current-limiting element. Thus, application of an excessive load across the terminals of the series capacitor due to the aforementioned fault can surely be prevented. Accordingly, unlike the conventional device, it is unnecessary to install an arrester for protection of the series capacitor and the configuration of the current-limiting and power-flow control device can be simplified.

A communications and processing module is provided. The communications and processing module is electrically coupleable to a circuit breaker to provide the circuit breaker with additional capabilities. The communications and processing module includes a housing, at least one electrical contact positioned in the housing, an output lug positioned in the housing, wherein an electrical path is defined between the at least one electrical contact and the output lug, at least one sensor positioned in the housing and operable to sense at least one operating condition of the circuit breaker, and at least one communications interface positioned in the housing and communicatively coupled to the at least one sensor, the communications interface operable to receive data from the at least one sensor that is indicative of the at least one sensed operating condition to facilitate exporting the received data to a remote computing device.

A multi-port system and method implements fault detection using a resistor connected to each port controller where the resistors of at least two port controllers are connected together in parallel. Each port controller supplies a predetermined current to the associated resistor and senses the resistor voltage of the parallelly connected resistors to detect for a fault condition. A failure condition is indicated when the resistor voltage is outside of a given threshold window. In this manner, for a single point failure, such as a short along the power path of a port controller, the other port controller senses a change in the resistor voltage and can assert a fault signal. In one embodiment, the fault signal is an open drain output and operates to pull down on a fault bus, which disables all the port controllers in the system through a disable input.

The invention relates to an arrangement for overload protection of overvoltage protection devices, consisting of at least one type II surge arrester with or without a thermal disconnecting device that responds in the event of an of overload. According to the invention, a switching unit free of movable contacts is connected in series with the at least one surge arrester and structurally combined therewith, which switching unit has at least two fixed narrow spaced switching contacts, wherein the spacing of the switching contacts is specified in such a way that in the event of every surge current or discharge process, the switching device changes into a quasi-closed state because of the arc formed; whereas in the idle state, the voltage of the connected mains drops at the switching device, with the surge arrester arranged in series remaining free of leakage current.

There is described a magnet assembly comprising a superconducting coil, a cryogenic system, a DC voltage source, an SMPS, current leads, and a controller. The cryogenic system comprises a cryostat and is configured to maintain the superconducting coil at an operating temperature below the critical temperature of the superconductor. The DC voltage is source located outside the cryostat. The SMPS is located inside the cryostat and configured to supply power from the DC voltage source to the superconducting coil. The SMPS comprises a voltage step-down transformer having a primary and a secondary winding. The current leads connect the DC voltage source to the SMPS. The controller is configured to cause the SMPS to supply a first amount of power to the magnet in order to ramp up the magnet to operating current, and a second amount of power to the magnet during steady state operation of the magnet, wherein the first amount of power is greater than the second amount of power.

A space vehicle includes one or more magnetorquers operable to change an attitude of the space vehicle in an external magnetic field, each magnetorquer comprising a coil, and a switching circuit for short-circuiting the coil of at least one of the magnetorquers so that a closed electric circuit comprising said coil is formed, for damping tumbling motion of the space vehicle in the external magnetic field. The switching circuit is configured to short-circuit the coil of the at least one magnetorquer upon occurrence of a condition indicative of end-of-life or failure of the space vehicle. The application further relates to a corresponding method of operating a space vehicle.

A space vehicle includes one or more magnetorquers operable to change an attitude of the space vehicle in an external magnetic field, each magnetorquer comprising a coil, and a switching circuit for short-circuiting the coil of at least one of the magnetorquers so that a closed electric circuit comprising said coil is formed, for damping tumbling motion of the space vehicle in the external magnetic field. The switching circuit is configured to short-circuit the coil of the at least one magnetorquer upon occurrence of a condition indicative of end-of-life or failure of the space vehicle. The application further relates to a corresponding method of operating a space vehicle.

A semiconductor package includes a metallic pad and leads, a semiconductor die including a semiconductor substrate attached to the metallic pad, and a conductor including a sacrificial fuse element above the semiconductor substrate, the sacrificial fuse element being electrically coupled between one of the leads and at least one terminal of the semiconductor die, a shock-absorbing material over a profile of the sacrificial fuse element, and mold compound covering the semiconductor die, the conductor, and the shock-absorbing material, and partially covering the metallic pad and leads, with the metallic pad and the leads exposed on an outer surface of the semiconductor package. Either a glass transition temperature of the shock-absorbing material or a melting point of the shock-absorbing material is lower than a melting point of the conductor.

Circuits for providing overcurrent protection are disclosed herein. The circuits feature depletion mode MOSFETs connected to resistive elements, preferably, Positive Temperature Coefficient (PTC) devices, configured in such a way so that the voltage across the PTC device is the same as the gate-to-source voltage of the MOSFET. The circuit may further be configured using a TVS diode, for clamping the drain-to-source voltage of the MOSFET during the overcurrent events. Heat transfer between the MOSFET and the PTC device facilitates overcurrent protection. A two-terminal device including a depletion mode MOSFET, a PTC device, and a TVS diode may provide overcurrent protection to other circuits. A bidirectional circuit c including two MOSFETS disposed on either side of a PTC is also contemplated for AC voltage overcurrent protection.

Driver circuitry for driving a power semiconductor switch having a control input and main terminals is described. The driver circuitry includes control terminal driver circuitry coupled to the control input and configured to provide a drive signal, a sense terminal coupled to the main terminal, a current mirror coupled to the sense terminal to mirror a current input into the sense terminal during turn-off, a first current comparator configured to compare a current signal received from the current mirror to a first current threshold and output a first signal representative of the comparison, and a second comparator configured to compare a signal received from the sense terminal to a turn-on threshold and output a second signal representative of the comparison. The turn-on threshold represents a highest voltage of the main terminal during turn-on. The first current threshold represents a highest voltage of the main terminal during turn-off.