H02H9/00

INRUSH CURRENT PROTECTION CIRCUIT FOR SOLID STATE LIGHTING FIXTURES
20220272813 · 2022-08-25 ·

An inrush current protection circuit for a solid state lighting fixture is provided. The inrush current protection circuit includes one or more current limiting devices and one or more switching devices coupled in parallel with the one or more current limiting devices. The one or more switching devices are configured in a first state when the solid state lighting fixture draws an inrush current from a power source. The inrush current is provided to the one or more current limiting devices when the one or more switching devices are in the first state. The one or more switching devices are configured in a second state when the solid state lighting fixture draws a steady-state current from the power source. The steady-state current bypasses the one or more current limiting devices when the one or more switching devices are in the second state.

ELECTRONIC DEVICE AND SOFT START MODULE
20170222544 · 2017-08-03 ·

An electronic device is provided. The electronic device includes a power supply module, a system load, a soft start unit, a unidirectional conducting unit and a connector. The system load is electrically coupled with the power supply module. The soft start unit is electrically coupled with the system load and the power supply module. The unidirectional conducting unit is electrically coupled between the soft start unit and the power supply module, so as to prevent the energy from the power supply module from entering the soft start unit. The connector has a power input terminal. The power input terminal is electrically coupled with the soft start unit.

Transmission circuit for ethernet
09722417 · 2017-08-01 · ·

A transmission circuit including four transmission component sets for Ethernet is provided. For each of the transmission component sets, a first capacitor and a first inductor are cascaded, the first inductor is coupled to the Ethernet connector via the first transmission line (TL), the first capacitor is coupled to the Ethernet chip via the second TL; a second capacitor and a second inductor are cascaded, the second inductor is coupled to the Ethernet connector via the third TL, the second capacitor is coupled to the Ethernet chip via the fourth TL; a first component set is coupled between a first contact and a second contact, the first contact is located between the first capacitor and the first inductor, and the second contact is located between the second capacitor and the second inductor; and a second component set is coupled between the second TL and the fourth TL.

Low capacitance transient voltage suppressor

A low capacitance transient voltage suppressor is disclosed. The transient voltage suppressor comprises a first diode with a first anode thereof coupled to an I/O port. A first cathode of the first diode and a second cathode of a second diode are respectively coupled to two ends of a resistor. A second anode of the second diode is coupled to a low-voltage terminal. A third anode and a third cathode of a third diode are respectively coupled to the second cathode and the resistor. The third diode induces a third parasitic capacitance smaller than a first capacitance of the first diode and a second parasitic capacitance of the second diode, and the third parasitic capacitance in series with the first and second parasitic capacitances dominate a small capacitance in a path during normal operation.

Protection circuit and control circuit

A protection circuit is provided with: a suppression element that is coupled to a power source side of a main circuit and suppresses current flowing into the main circuit that drives a load; and a soft start circuit that is configured to gradually increase voltage of a control terminal of the suppression element when voltage is applied to the soft start circuit from a boosting circuit used for controlling the main circuit.

Hotswap operations for programmable logic devices

Techniques are provided to control hotswap operations with programmable logic devices (PLDs). In particular, a MOSFET is provided to limit an in-rush current drawn from a power supply by capacitive components of an electronic assembly when it is plugged into the live, power supply. A controller with an algorithm is provided to control the MOSFET based on the in-rush current detected at the MOSFET. As such, a feedback control loop is established to selectively bias the gate of the MOSFET based on the detected in-rush current. The algorithm may limit the in-rush current based on a Safe Operating Area (SOA) of the MOSFET. The hotswap process may include multiple phases each with a voltage and/or current limit modeling the voltages and currents of the SOA. The algorithm may transition through the phases with the respective current and/or voltage limits during the hotswap process.

Intrinsically safe voltage limiting shunt regulator circuit

An intrinsically safe redundant regulator circuit includes a plurality of voltage limiting regulators between a regulated rail and a ground rail. Each of the plurality of voltage limiting regulators includes: (i) a shunt regulator component configured to clamp a voltage across the regulated rail and the ground rail to a safety clamp voltage value; and (ii) one or more components, where a property of each of the one or more components is selected to configure the safety clamp voltage value.

INTERFACE DEVICE PROVIDING INTRINSIC SAFETY FOR A COMMUNICATIONS DEVICE

An interface device for providing Intrinsic Safety to a Smart Identity Module (SIM) card includes a buffer circuit including a voltage regulator and a voltage level translator including drivers. Baseband processor side pins include at least an input/output (IO) pin for receiving data signals, first SIM reset (RST) pin, core power supply (VCC) pin, a clock (CLK) pin, a battery power supply (VBAT) pin, and SIM side pins include at least a VCC pin, a SIM CLK pin, second SIM RST pin, and a SIM IO pin. There is at least one series resistor (R.sub.1, R.sub.2, R.sub.3, R.sub.4 and R.sub.5) in series with each of the baseband processor side pins.

Circuit and method of electrically decoupling nodes

A device includes a first power node, a second power node, a first input node, a second input node, a protected circuit, and a switch circuit. The protected circuit is coupled between the first power node and the second power node, and the protected circuit is further coupled with the second input node. The switch circuit is coupled with the first power node, the second power node, the first input node, and the second input node. The switch circuit is configured to electrically decouple the first input node and the second input node after (a) the first power node is floating or electrically coupled to the second power node and (b) a voltage level at the first input node is greater than a voltage level at the second power node by a predetermined voltage value.

Explosion Protection Circuit with Impedance Matching
20170256937 · 2017-09-07 ·

An apparatus for monitoring at least one physical or chemical process variable, comprising at least one sensor unit and an electronics unit for signal registration, evaluation and/or feeding, wherein the sensor unit is operated with alternating electrical current and/or communication between the electronics unit and the sensor unit occurs with alternating electrical current and/or alternating voltage. An explosion protection circuit with intrinsic safety, which includes a safety barrier, which has at least one unit for electrical current- and/or voltage limiting, is provided within the explosion protection circuit a unit for impedance matching, which unit for impedance matching includes at least one transformer.