PWM control of first and second inverters that control a double-winding type rotating electric machine is performed with mode switching between asynchronous PWM and synchronous PWM. A first-group triangular wave used for the PWM control of the first inverter is switched from the asynchronous PWM to the synchronous PWM in first timing at which carrier phases of an asynchronous PWM triangular wave and a synchronous triangular wave are matched with each other. A second-group of triangular wave used for the PWM control of the second inverter is switched from the asynchronous PWM to the synchronous PWM in second timing at which the carrier phases of the asynchronous PWM triangular wave and the synchronous triangular wave are matched with each other.

In accordance with an embodiment, a method includes using a monitoring circuit disposed on a monolithic integrated circuit to monitor an output signal of a first switching transistor for a first output edge transition at a monitoring terminal of the monolithic integrated circuit; using a time measuring circuit disposed on the monolithic integrated circuit to measure a first time delay between a first input edge transition of a first drive signal and the first output edge transition, where the first drive signal is configured to cause a change of state of the first switching transistor; using an analysis circuit disposed on the monolithic integrated circuit to compare the measured first time delay with a first predetermined threshold to form a first comparison result; and indicating a first error condition based on the first comparison result.

A motor control apparatus includes an inverter comprising switching elements, current detection means for detecting a phase current value output from the inverter to each phase of a three-phase AC motor, conversion means for converting the phase current value into a digital AD conversion value, and modulation means for comparing a phase voltage command value based on the AD conversion value from the conversion means with a PWM counter value generated using a timer operating at predetermined cycles to generate a PWM signal and outputting the generated PWM signal to the inverter to thereby switch the switching elements of the inverter and control the three-phase AC motor. The conversion means outputs the AD conversion value acquired by converting the phase current value at a timing when a rectangular width of a rectangular wave of a phase voltage value corresponding to the PWM counter value is long.

An electronic circuit includes a first switch driver, a second switch driver, and a switch node coupled to the first and second switch drivers, and configured to couple to a motor. The electronic circuit also includes slew rate measurement circuitry coupled to the switch node and configured to measure a slew rate of switching operations at the switch node. The electronic circuit also includes a controller coupled to the first switch driver, to the second switch driver, and to the slew rate measurement circuitry, and configured to compare a measured slew rate provided by the slew rate measurement circuitry with a target slew rate, and to selectively adjust control signals to at least one of the first and second switch drivers based on a comparison result. The first and second switch drivers are configured to drive switches to power the motor based on the control signals.

An electronic circuit includes a first switch driver, a second switch driver, and a switch node coupled to the first and second switch drivers, and configured to couple to a motor. The electronic circuit also includes slew rate measurement circuitry coupled to the switch node and configured to measure a slew rate of switching operations at the switch node. The electronic circuit also includes a controller coupled to the first switch driver, to the second switch driver, and to the slew rate measurement circuitry, and configured to compare a measured slew rate provided by the slew rate measurement circuitry with a target slew rate, and to selectively adjust control signals to at least one of the first and second switch drivers based on a comparison result. The first and second switch drivers are configured to drive switches to power the motor based on the control signals.

A vehicle drive control device that controls a vehicle drive device in which a first engagement device, a rotating electrical machine, and a second engagement device are provided in this order from an input side in a mechanical power transmission path connecting an input to an output, the input being drive-coupled to an internal combustion engine serving as a vehicle drive power source, and the output being drive-coupled to wheels, wherein each of the first engagement device and the second engagement device can be changed between an engaged state in which drive power is transmitted and a disengaged state in which drive power is not transmitted, the vehicle control device including an electronic control unit.

In accordance with an embodiment, a method includes using a monitoring circuit disposed on a monolithic integrated circuit to monitor an output signal of a first switching transistor for a first output edge transition at a monitoring terminal of the monolithic integrated circuit; using a time measuring circuit disposed on the monolithic integrated circuit to measure a first time delay between a first input edge transition of a first drive signal and the first output edge transition, where the first drive signal is configured to cause a change of state of the first switching transistor; using an analysis circuit disposed on the monolithic integrated circuit to compare the measured first time delay with a first predetermined threshold to form a first comparison result; and indicating a first error condition based on the first comparison result.

An electric brake device selectively using, based on requests, a control scheme that reduces torque variation and a control scheme that maximizes a torque to provide a quiet operation with smaller torque variation for prioritizing Noise Vibration Harshness and a high torque operation or high output operation for prioritizing torque or output. A motor current calculator selectively uses an output prioritizing control scheme that prioritizes a torque output and a torque variation suppressing control scheme that prioritizes smaller torque variation. An output requirement determiner calculates a degree of importance of suppressing torque variation of an electric motor, based on one or both of a braking request and a travel condition of a vehicle. In accordance with this determination result, the motor current calculator selectively uses the output prioritizing control scheme and the torque variation suppressing control scheme.

An electric brake device selectively using, based on requests, a control scheme that reduces torque variation and a control scheme that maximizes a torque to provide a quiet operation with smaller torque variation for prioritizing Noise Vibration Harshness and a high torque operation or high output operation for prioritizing torque or output. A motor current calculator selectively uses an output prioritizing control scheme that prioritizes a torque output and a torque variation suppressing control scheme that prioritizes smaller torque variation. An output requirement determiner calculates a degree of importance of suppressing torque variation of an electric motor, based on one or both of a braking request and a travel condition of a vehicle. In accordance with this determination result, the motor current calculator selectively uses the output prioritizing control scheme and the torque variation suppressing control scheme.

A phase loss detection device, a compressor including the same, and a phase loss detection method are disclosed. The phase loss detection device may include a signal converting circuit and a processor. The signal converting circuit is configured to convert voltage signals corresponding to respective phases of multiphase alternating current (AC) power monitored from a motor. The processor is configured to receive the converted voltage signals from the signal converting circuit, and configured to calculate, based on the converted voltage signals, one or more phase angles between the respective voltage signals. The processor is configured to determine that phase loss occurs if any one or more of the calculated phase angles deviate from a nominal value of a corresponding phase angle of the multiphase AC power by a value higher than a predetermined threshold. The phase loss detection can be performed in a convenient, effective and reliable way.