In a power switching apparatus, a first switch includes a first end coupled to a first input terminal, a second end coupled to an output terminal, and a control end coupled to a second input terminal and coupled to a ground via a first resistor. A second resistor is coupled between the output terminal and the ground. A second switch includes a first end coupled to the second input terminal, a second end coupled to the output terminal and a control end coupled to the ground via a third resistor. A third switch includes a first end coupled to the control end of the second switch and the first end of the third resistor, a second end coupled to the first input terminal and a control end coupled to the second input terminal and coupled to the ground via the first resistor.

A semiconductor device includes a first terminal, a second terminal, a first transistor, and a switching circuitry. In the first transistor, an anode of a body diode is connected to the first terminal, and a cathode of the body diode is connected to the second terminal. The switching circuitry is connected between a gate and a source of the first transistor, and switches a connection state between the gate and the source of the first transistor.

A transmitter may include an emphasis circuit suitable for generating a first pull-down driving signal in response to first data and delayed second data, and generating a first pull-up driving signal in response to second data and delayed first data, wherein the first and second data are a differential pair; a phase skew compensation circuit suitable for compensating for a phase skew between the first pull-up driving signal and the first pull-down driving signal to generate a second pull-up driving signal and a second pull-down driving signal; a pull-up driver suitable for pull-up driving an output node in response to the second pull-up driving signal; and a pull-down driver suitable for pull-down driving the output node in response to the second pull-down driving signal.

Provided is a semiconductor device exemplified by an inverter circuit and a shift register circuit, which is characterized by a reduced number of transistors. The semiconductor device includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is electrically connected to a first wiring, and the other thereof is electrically connected to a second wiring. One of a source and a drain of the second transistor is electrically connected to the first wiring, a gate of the second transistor is electrically connected to a gate of the first transistor, and the other of the source and the drain of the second transistor is electrically connected to one electrode of the capacitor, while the other electrode of the capacitor is electrically connected to a third wiring. The first and second transistors have the same conductivity type.

Provided is a semiconductor device exemplified by an inverter circuit and a shift register circuit, which is characterized by a reduced number of transistors. The semiconductor device includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is electrically connected to a first wiring, and the other thereof is electrically connected to a second wiring. One of a source and a drain of the second transistor is electrically connected to the first wiring, a gate of the second transistor is electrically connected to a gate of the first transistor, and the other of the source and the drain of the second transistor is electrically connected to one electrode of the capacitor, while the other electrode of the capacitor is electrically connected to a third wiring. The first and second transistors have the same conductivity type.

A low noise amplifier includes at least two variable gain amplifier stages, each variable gain amplifier configured to accept an input signal and to provide a load driving signal; a tunable bandpass filter connected as a load to each variable gain amplifier stage, wherein each bandpass filter includes a resonant tank, each resonant tank including an inductor, wherein each inductor of each resonant tank is oriented in orthogonal relation with respect to each respective longitudinal axis of each next inductor, the orthogonal relation of the respective longitudinal axes configured to reduce mutual coupling between the tunable bandpass filters; a cross-coupled transistor pair, and at least one cross-coupled compensation transistor pair biased in a subthreshold region configured to add a transconductance component as a function of a load driving signal; and, a controller circuit configured to tune each tunable bandpass filter.

An electronic circuit board includes a substrate having a multilayer structure including a ground layer, has at least one configuration in which, in a ground layer closest to a signal terminal of an oscillator, a region overlapping a signal terminal in a plan view is a non-forming region of a ground electrode, in a ground layer closest to a first wiring connecting the signal terminal of the oscillator and an input portion of an amplifier, a region overlapping the first wiring in the plan view is a non-forming region of a ground electrode, and in a ground layer closest to a second wiring connecting the signal terminal of the oscillator and an output portion of the amplifier, a region overlapping the second wiring in the plan view is a non-forming region of a ground electrode.

A pedestal on which a beveled blank is mounted is provided with a recess portion and an edge portion. The recess portion is provided in a central part of a surface of a pedestal body of the pedestal. The edge portion is adjacent to the recess portion to which the blank is fixed. The recess portion has a length in the short side direction of the pedestal body longer than that of the short side of the blank.

A pedestal on which a beveled blank is mounted is provided with a recess portion and an edge portion. The recess portion is provided in a central part of a surface of a pedestal body of the pedestal. The edge portion is adjacent to the recess portion to which the blank is fixed. The recess portion has a length in the short side direction of the pedestal body longer than that of the short side of the blank.

Provided is a semiconductor device exemplified by an inverter circuit and a shift register circuit, which is characterized by a reduced number of transistors. The semiconductor device includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is electrically connected to a first wiring, and the other thereof is electrically connected to a second wiring. One of a source and a drain of the second transistor is electrically connected to the first wiring, a gate of the second transistor is electrically connected to a gate of the first transistor, and the other of the source and the drain of the second transistor is electrically connected to one electrode of the capacitor, while the other electrode of the capacitor is electrically connected to a third wiring. The first and second transistors have the same conductivity type.