A switched capacitor circuit includes a first main sampler circuit, a second main sampler circuit, a first replica sampler circuit, and a second replica sampler circuit. The first main sampler circuit samples a first input of a differential input, and generates a first output corresponding to the sampled first input based on a first reference voltage. The second main sampler circuit samples a second input of the differential input, and generates a second output corresponding to the sampled second input based on a second reference voltage. The first replica sampler circuit receives the first input, and holds the received first input based on the second reference voltage. The second replica sampler circuit receives the second input, and holds the received second input based on the first reference voltage.

A switched-capacitor power amplifier comprising a plurality of cells and methods for its operation are described. Switched signal lines switch supply to respective capacitors. Switches connect respective signal lines to a first supply and switches connect respective signal lines to a second supply. Pairs of switches on each signal line are switched so that one is switched off whilst the other is switched on. In a full amplitude mode, operation of the switches provides an output having a peak determined by the first supply. A switch signal line is provided between nodes in respective signal lines, a switch being provided in the switch signal line. In a half amplitude mode, switch is switched at the radio frequency in the other direction to that of switches connecting the signal lines to respective ones of the first and second supplies with the other switches being kept open.

An amplifier comprises: an input stage, a pulse width modulation stage, and a switched output stage. During operation, the input stage receives an input signal (such as an audio signal). The input stage adjusts the input signal based on feedback from the switched output stage of the amplifier. According to one configuration, the feedback from the switched output stage is a voltage across a flying capacitor disposed in the switched output stage. The pulse width modulation stage uses the adjusted input signal or signals to produce respective pulse width modulation signals that are subsequently used to drive (control) switches in the switched output stage. The switches in the switched output stage generate an output voltage to drive a load based on states of the pulse width modulation signals. Adjustments applied to the input signal based on the feedback maintains the magnitude of the flying capacitor voltage at a desired setpoint.

A device of integration of an electric current received on an integration node, includes an operational amplifier, an integration capacitor, and a circuit for modifying an output voltage of the operational amplifier formed by a charge transfer circuit configured to be connected on the integration node and to transfer charges into the integration capacitor. The device also includes a comparison circuit configured to trigger the modification circuit at least once during the integration duration, and a storage circuit configured to store the number of triggerings which have occurred during the integration duration. The received electric current is calculated according to the output voltage as well as to the number of triggerings multiplied by the modification of the output voltage induced by the modification circuit.

A signal processing circuit, which has a pair of input nodes and a pair of output nodes, includes a first switch pair, a second switch pair, an amplifier, a first compensation capacitor and a second compensation capacitor. The first switch pair is coupled between the pair of input nodes and a plurality of floating nodes. The second switch pair is coupled between the plurality of floating nodes and the pair of output nodes. The amplifier is coupled between the plurality of floating nodes and the pair of output nodes. The first compensation capacitor is coupled between a first floating node among the plurality of floating nodes and a first output node among the pair of output nodes. The second compensation capacitor is coupled between a second floating node among the plurality of floating nodes and the first output node.

Magnetic field sensors and associated techniques use a Hall effect element in a current spinning arrangement in combination with a rippled reduction feedback network configured to reduce undesirable spectral components generated by the current spinning and other circuit elements.

A switched capacitor digital power amplifier (DPA) or a digital-to-analog converter (DAC) is disclosed. The DPA/DAC includes a plurality of switched capacitor cells connected in parallel. Each switched capacitor cell includes a capacitor and a switch. The switch selectively drives the capacitor in response to an input digital codeword. The switched capacitor cells are divided into sub-arrays and a series capacitor is inserted in series between two adjacent sub-arrays of switched capacitor cells. All the sub-arrays of switched capacitor cells may be in a unary-coded structure. Alternatively, at least one of the sub-arrays may be in a C-2C structure and at least one another sub-array may be in a unary-coded structure. The switch in the switched capacitor cells is driven by a local oscillator signal, and a phase correction buffer may be added for adjusting a delay of the local oscillator signal supplied to sub-arrays of switched capacitor cells.

RF signal amplifiers are provided that include an RF input port, a switching device having an input that is coupled to the RF input port, a first output and a second output, a first diplexer having an input that is coupled to both the first output of the switching device and the second output of the switching device, and a first RF output port that is coupled to an output of the first diplexer. These amplifiers further include an attenuator that is coupled between the second output of the switching device and the input of the first diplexer.

RF signal amplifiers are provided that include an RF input port, a switching device having an input that is coupled to the RF input port, a first output and a second output, a first diplexer having an input that is coupled to both the first output of the switching device and the second output of the switching device, and a first RF output port that is coupled to an output of the first diplexer. These amplifiers further include an attenuator that is coupled between the second output of the switching device and the input of the first diplexer.

Embodiments of the disclosure are drawn to apparatuses and methods for transmission beamforming. A multiphase beam steering transmitter may include a transmitter array of multiple transmitters. A transmitter may include a multiphase logic decoder that directly controls a power amplifier to perform a vector addition of a beam phase and amplitude. A transmitter of the array may include a multiphase clock generator that outputs basis phases with embedded phase modulation data which are output to the multiphase logic decoder. The multiphase clock generator may receive a modulated clock signal. The PA may be a multiphase switched capacitor power amplifier. The multiphase logic decoder may output two phases adjacent to a desired phase as inputs to clocks of the SCPA. The multiphase logic decoder may further output a control signal that determines which cells in the SCPA are activated and when.