A signal processing circuit reduces die size and power consumption for each antenna element. The signal processing circuit includes a first set of ports, a third port, a first path, a second path and a first transistor. The first path is between a first port of the first set of ports and the third port. The second path is between a second port of the first set of ports and the third port. The first transistor is coupled between the first path and the second path. The first transistor is configured to receive a control signal to control the first transistor to adjust an impedance between the first path and the second path.

An amplifier includes an amplification circuit, an equalization circuit, an output circuit, a first gain adjusting circuit, and a second gain adjusting circuit. The amplification circuit changes voltage levels of first and second amplification nodes based on first and second input signals. The equalization circuit changes the voltage levels of the first and second amplification nodes. The output circuit generates an output signal based on the voltage levels of the first and second amplification nodes. The first gain adjusting circuit changes voltage levels applied to the first and second amplification nodes based on the voltage levels of the first and second amplification nodes and a first gain control signal. The second gain adjusting circuit changes a voltage level of the output signal based on a second gain control signal.

A method of controlling bandwidth and peaking over gain in a variable gain amplifier (VGA) device and structure therefor. The device includes at least three differential transistor pairs configured as a cross-coupled differential amplifier with differential input nodes, differential bias nodes, differential output nodes, a current source node, and two cross-coupling nodes. The cross-coupled differential amplifier includes a load resistor coupled to each of the differential output nodes and one of the cross-coupling nodes, and a load inductor coupled to the each of the cross-coupling nodes and a power supply rail. A current source is electrically coupled to the current source node. The cross-coupling configuration with the load resistance and inductance results in a lower bandwidth and lowered peaking at low gain compared to high gain. Further, the tap point into the inductor can be chosen as another variable to tune the bandwidth and peaking in a communication system.

Wideband signal buffers that can be employed for mmWave (millimeter wave) communication are disclosed. One example signal buffer comprises a variable gain amplifier (VGA) that receives two control words and outputs a feedback signal, wherein both an amplitude and a phase of the feedback signal are based on the two control words and on a bias voltage; and a matching network comprising a first inductor that outputs the bias voltage, a second inductor, and a third inductor that receives the feedback signal from the VGA, and wherein the first, second, and third inductors are magnetically coupled to each other, wherein the signal buffer is configured to receive a RF (Radio Frequency) input and to generate a RF output from the RF input based on a transfer function of the signal buffer, wherein the transfer function is based at least in part on the feedback signal.

A variable-gain power amplifying technique includes generating, with a network of one or more reactive components included in an oscillator, a first oscillating signal, and outputting, via one or more taps included in the network of the reactive components, a second oscillating signal. The second oscillating signal has a magnitude that is proportional to and less than the first oscillating signal. The power amplifying technique further includes selecting one of the first and second oscillating signals to use for generating a power-amplified output signal, and amplifying the selected one of the first and second oscillating signals to generate the power-amplified output signal.

The present disclosure provides a power amplifier circuit capable of suppressing the occurrence of noises while enabling control of an output power level. The power amplifier circuit includes a first transistor that amplifies a first signal; a bias circuit that supplies a bias current or voltage based on a control signal to the first transistor; a second transistor to which a control current based on the control signal is supplied, which has an emitter or a source thereof connected to a collector or a drain of the first transistor, and from which a second signal obtained by amplifying the first signal is output; and a first feedback circuit provided between the collector or the drain of the second transistor and the base or the gate of the second transistor.

First switches are respectively connected between multiple input terminals and an inverting input of an operational amplifier. Second switches and feedback resistors are respectively sequentially series-connected between an output of the operational amplifier and nodes between the multiple input terminals and the first switches. Third switches are respectively connected between nodes between the second switches and the feedback resistors and an output terminal of an amplification circuit with an analog multiplexer.

A power amplifier circuit includes a first transistor that amplifies an RF signal; a bias current source that supplies a bias current to a second terminal of the first transistor through a first current path; and an adjustment circuit that adjusts the bias current in accordance with a variable power-supply voltage supplied from a power-supply terminal. The adjustment circuit includes first to third resistors, and an adjustment transistor including a first terminal connected to the power-supply terminal through the first resistor, a second terminal connected to the bias current source through the second resistor, and a third terminal connected to the first current path through the third resistor. When the variable power-supply voltage is not less than a first voltage and not greater than a third voltage, the adjustment circuit increases a current that flows to the power-supply terminal through a second current path as the variable power-supply voltage decreases.

Reference oscillators are ubiquitous in timing applications generally, and in modern wireless communication devices particularly. Microelectromechanical system (MEMS) resonators are of particular interest due to their small size and potential for integration with other MEMS devices and electrical circuits on the same chip. In order to support their use in high volume low cost applications it would be beneficial for MEMS designers to have MEMS resonator designs and manufacturing processes that whilst employing low cost low resolution semiconductor processing yield improved resonator performance thereby reducing the requirements of the oscillator circuitry. It would be further beneficial for the oscillator circuitry to be able to leverage the improved noise performance of differential TIAs without sacrificing power consumption.

Apparatus and methods for envelope tracking systems with automatic mode selection are provided herein. In certain configurations, a power amplifier system includes a power amplifier configured to provide amplification to a radio frequency signal and to receive power from a power amplifier supply voltage, and an envelope tracker including a signal bandwidth detection circuit configured to generate a detected bandwidth signal based on processing an envelope signal corresponding to an envelope of the radio frequency signal. The envelope tracker further includes a switch bank configured to receive a plurality of regulated voltages, a filter configured to filter an output of the switch bank to generate the power amplifier supply voltage, and a mode control circuit configured to control a filtering characteristic of the filter based on the detected bandwidth signal.