The present disclosure describes a method and system for linearizing an amplifier using transistor-level dynamic feedback. The method and system enables nonlinear amplifiers to exhibit linear performance using one or more of gain control elements and phase shifters in the feedback path. The disclosed method and system may also allow an amplifier to act as a pre-distorter or a frequency/gain programmable amplifier.

A semiconductor circuit including a clocked comparator and an offset application circuit. The clocked comparator is configured to receive a first input signal and a second input signal from a host and compare the first input signal and the second input signal. The offset application circuit is configured to apply an offset to the first input signal. The clocked comparator is configured to be driven based on a reference clock provided from the host.

The present invention is directed to electrical circuits. More specifically, embodiments of the present invention provide a variable gain amplifier (VGA) device that includes a low-gain tuning section and a high-gain tuning section. The low-gain tuning section includes both resistor and transistor elements. The high-gain tuning section includes a transistor element and is activated when an output gain is greater than a predetermined threshold level. There are other embodiments as well.

Disclosed is a differential transimpedance amplifier. The differential transimpedance amplifier includes a common gate amplifier configured to receive an electrical signal from an input node, and a common source amplifier configured to have a feedback resistor and receive the electrical signal form the input node. An output signal of the common gate amplifier and an output signal of the common source amplifier form a differential signal pair. The common gate amplifier and the common source amplifier each includes a load having a transformer which removes an effect of parasitic capacitance.

Amplifier systems and methods are provided that include a fixed gain amplification stage coupled to an adjustable attenuation stage further coupled to a variable gain amplification stage. A controller controls an amount of attenuation provided by the adjustable attenuation stage and an amount of gain provided by the variable gain amplification stage to maintain any of various noise, efficiency, and/or linearity requirements of the amplifier system.

A broadband amplifier assembly is provided that includes a fixed gain amplifier coupled to an adjustable attenuator which is further coupled to a power amplifier. The adjustable attenuator includes a plurality of attenuation cells directly coupled in series between the input and the output of the adjustable attenuator.

A circuit includes an overshoot-and-undershoot (OU) signal generator generating a signal indicating detection of an overshoot or an undershoot of an output signal of the power converter. The circuit further includes a feedback signal modulator receiving a first feedback signal and the signal indicating detection of the overshoot or the undershoot and generating a second feedback signal in response to the first feedback signal and the signal indicating detection of the overshoot or the undershoot. The feedback signal modulator generates the second feedback signal that is different from the first feedback signal during a predetermined time interval after the signal indicating detection of the overshoot or the undershoot has been asserted.

Disclosed herein are signal amplifiers having a plurality of amplifier cores. Individual amplifier cores can be designed for particular gain modes to enhance particular advantages while reducing other disadvantages. The signal amplifier can then switch between amplifier cores when switching gain modes to achieve desired performance characteristics (e.g., improving noise figure or linearity). Examples of signal amplifiers disclosed herein include amplifier architectures with a high gain amplifier core that reduces the noise figure and a linearity boost amplifier core that increases linearity (e.g., for lower gain modes). The disclosed signal amplifiers can also have switchable reference biases to provide targeted bias current matching. The disclosed signal amplifiers can also include degeneration switching blocks for individual amplifier cores to improve signal linearity.

A bandgap reference circuit including a clamp circuit is provided. The bandgap reference circuit performs the calibration only for one time in a normal mode to store a control code of a reference generator of the clamp circuit. In a suspend mode, the control code is used for controlling the reference generator to cause the clamp circuit to provide a desired source voltage, and a bandgap reference voltage source is shut down to reduce the power consumption.

A DC-DC converter includes an inductor, and generates a regulated voltage from a power source. The current flow through the inductor is increased at a first rate in a first interval. In a second interval, the current flow through the inductor is either increased at a second rate or decreased at a third rate depending on whether the regulated voltage is required to be respectively less than or greater than a voltage of the power source. The current flow through the inductor is decreased at a fourth rate in a third interval. The sequence formed by the first interval, the second interval and the third interval is repeated, and followed for all values of the regulated voltage from a lower threshold to higher threshold. The higher threshold has a value greater than the voltage of the power source. The lower threshold is zero volts.