Split cascode circuits include multiple cascode paths coupled between voltage supply rails. Each cascode path includes a pair of controllable switches. A feedback path is provided for at least one of the cascode circuit paths. An active load circuit may also have a split cascode structure. Multiple-stage circuits, for implementation in Trans-Impedance Amplifiers (TIAs) or analog Receive Front-End modules (RXFEs), for example, include multiple stages of split cascode circuits.

To provide a variable gain amplifier capable of correcting a DC offset voltage through simpler control even when a gain thereof is changed. A differential output type variable gain amplifier is equipped with a first voltage correction unit coupled to a preceding stage of a variable gain amplifier circuit and for outputting a first correction voltage to correct a potential difference generated between a first conductor provided with a first input resistor and a second conductor provided with a second input resistor, and a second voltage correction unit coupled to a subsequent stage of the variable gain amplifier circuit and for correcting a differential output. A control unit is configured to control the first correction voltage and a correction amount of a potential difference by the second voltage correction unit and thereby attenuate a DC offset voltage included in the differential output.

An amplifying circuit includes a first gain adjusting circuit, a second gain adjusting circuit, a load circuit and a switch module. When the amplifying circuit operates in a first mode, the first gain adjusting circuit receives a first input signal, and generates a first output signal to a second output terminal of the amplifying circuit via the load circuit and the switch module; and when the amplifying circuit operates in a second mode, the second gain adjusting circuit receives a second input signal, and generates a second output signal to a first output terminal of the amplifying circuit via the load circuit and the switch module.

A programmable gain amplifier includes an operational amplifier and a resistor network coupled to the output node of the operational amplifier. The resistor network includes a first plurality of resistors coupled in series between the output node and a first network node. A second plurality of resistors is coupled in series between the first network node and a second network node. A unit resistor is coupled in parallel with the second plurality of resistors between the first and second resistor network nodes and a third plurality of resistors is coupled in parallel between the second resistor network node and a reference voltage. Each resistor of the second and third pluralities of resistors comprises a unit resistor. The third plurality of resistors contains N resistors and the second plurality of resistors contains (N?1) resistors.

A distributed amplifier system comprising an impedance matching network configured to match an input impedance to an output impedance of the signal source, and a DC block configured to block DC components in the input signal. A variable gain amplifier adjusts the gain applied to the input signal based on a gain control signal to generate a gain adjusted signal. An emitter follower circuit receives and processes the gain adjusted signal to introduce gain peaking to create a modified signal. A distributed amplifier receives and amplifies the modified signal from the emitter follower circuit, to create an amplified signal. The distributed amplifier includes a termination network and one or more impedance matching elements configured for gain shaping the amplified signal. The gain peaking introduced by the emitter follower circuit is controlled by a variable current source. The distributed amplifier may be an open collector distributed amplifier.

A distributed amplifier system comprising an impedance matching network configured to match an input impedance to an output impedance of the signal source, and a DC block configured to block DC components in the input signal. A variable gain amplifier adjusts the gain applied to the input signal based on a gain control signal to generate a gain adjusted signal. An emitter follower circuit receives and processes the gain adjusted signal to introduce gain peaking to create a modified signal. A distributed amplifier receives and amplifies the modified signal from the emitter follower circuit, to create an amplified signal. The distributed amplifier includes a termination network and one or more impedance matching elements configured for gain shaping the amplified signal. The gain peaking introduced by the emitter follower circuit is controlled by a variable current source. The distributed amplifier may be an open collector distributed amplifier.

A transimpedance amplifier (TIA) includes a voltage amplifier and a first set of variable-resistors connected in parallel as a variable shunt feedback to the voltage amplifier. A control circuit is connected to control the variable resistors of the first set in a manner responsive to a TIA gain control voltage V.sub.GC. The control circuit includes a ramp generator and a reference set of variable-resistors connected in parallel. The ramp generator is configured to generate, responsive to an output voltage of the control circuit, a plurality of ramp voltages such that each of the voltages adjusts a corresponding one of the variable-resistors of the first set and of the reference set.

In some embodiments, a method for processing an audio signal in an audio processing apparatus is disclosed. The method includes receiving an audio signal and a parameter, the parameter indicating a location of an auditory event boundary. An audio portion between consecutive auditory event boundaries constitutes an auditory event. The method further includes applying a modification to the audio signal based in part on an occurrence of the auditory event. The parameter may be generated by monitoring a characteristic of the audio signal and identifying a change in the characteristic.

In some embodiments, a method for processing an audio signal in an audio processing apparatus is disclosed. The method includes receiving an audio signal and a parameter, the parameter indicating a location of an auditory event boundary. An audio portion between consecutive auditory event boundaries constitutes an auditory event. The method further includes applying a modification to the audio signal based in part on an occurrence of the auditory event. The parameter may be generated by monitoring a characteristic of the audio signal and identifying a change in the characteristic.

An automatic gain control (AGC) attenuator for an amplifier. In one example, the AGC attenuator includes a first transistor stack including a plurality of first banks of current steering differential transistor pairs and configured to receive a radio frequency (RF) input signal and output a first attenuated RF signal. Each first bank of the plurality of first banks is configured to attenuate the RF input signal by a predetermined value. The AGC attenuator also includes a second transistor stack that includes a plurality of second banks of current steering differential transistor pairs. The second transistor stack is cascoded to the first transistor stack, and is configured to receive the first attenuated RF signal and output a second attenuated RF signal. Each second bank of the plurality of second banks is configured to attenuate the first attenuated RF signal by a predetermined value.