A programmable gain amplifier includes an operational amplifier and a resistor network coupled to the output node of the operational amplifier. The resistor network includes a first plurality of resistors coupled in series between the output node and a first network node. A second plurality of resistors is coupled in series between the first network node and a second network node. A unit resistor is coupled in parallel with the second plurality of resistors between the first and second resistor network nodes and a third plurality of resistors is coupled in parallel between the second resistor network node and a reference voltage. Each resistor of the second and third pluralities of resistors comprises a unit resistor. The third plurality of resistors contains N resistors and the second plurality of resistors contains (N?1) resistors.

A power amplifier module includes a first bipolar transistor configured to amplify a radio frequency signal and output an amplified signal and a second bipolar transistor. A base of the second bipolar transistor is supplied with a control voltage for controlling attenuation of the radio frequency signal, and a collector the second bipolar transistor is supplied with a source voltage. The power amplifier module also includes a first resistor, where one end of the first resistor is connected to a supply path of the radio frequency signal to the first bipolar transistor, and a capacitor, where one end of the capacitor is connected to the other end of the first resistor and the other end of the capacitor is connected to the collector of the second bipolar transistor.

A variable gain amplifier includes an input transistor, an auxiliary transistor, an active inductor and an input current replica circuit. The input transistor is arranged for receiving an input signal to generate an output signal at an output terminal. The auxiliary transistor is coupled to the output terminal of the input transistor, wherein a current of the output terminal flows into the input transistor and the auxiliary transistor. The active inductor is coupled to the output terminal of the input transistor. The input current replica circuit is coupled to the output terminal of the input transistor, wherein a current flowing through a portion of the input current replica circuit is equal to the current flowing through the input transistor, and both a current of the active inductor and the current of the portion of the input current replica circuit flow into the output terminal of the input transistor.

A programmable gain amplifier includes a first-stage operational transconductance amplifier (OTA), a second-stage OTA, a capacitor module, a clock oscillation circuit, and a correction circuit. An input terminal of the second-stage OTA is connected to an output terminal of the first-stage OTA. The capacitor module is connected between the output terminal of the first-stage OTA and an output terminal of the second-stage OTA. The clock oscillation circuit is connected to the output terminal of the first-stage OTA and the capacitor module, and is configured to perform charging and discharging of the capacitor module by an output current from the first-stage OTA to output a clock signal. The correction circuit is connected to the clock oscillation circuit and the capacitor module to adjust a capacitance of the capacitor module so that a clock frequency of the clock signal is consistent with a preset clock frequency.

An amplifier includes a gain stage having a gain stage input and a gain stage output and an impedance matching circuit connected to the gain stage output, the impedance matching circuit including an input and an output. The amplifier also includes a coupling circuit connected to the input of the impedance matching circuit and a shorting circuit connected to the output of the impedance matching circuit. The coupling circuit provides a voltage to the shorting circuit that causes the shorting circuit create a short to ground through a reflecting capacitor which causes a reflection to be provided to the output of the impedance matching circuit and that is transmitted to the coupling circuit to increase the voltage provided to the shorting circuit by the coupling circuit.

A transmit/receive switching circuit implementation reduces transmitting/receiving switching losses in a transceiver during different modes of operation. The implementation includes connecting a low noise amplifier and a power amplifier in accordance with a shunt configuration in the transceiver. The implementation also includes disabling the power amplifier to achieve a high impedance state by grounding an output stage bias and enabling the low noise amplifier and disabling one or more transistors connected to a path between the low noise amplifier and the power amplifier during a receive mode.

An adjustable gain power amplifier, a gain adjustment method and a mobile terminal are disclosed. The adjustable gain power amplifier comprises an input matching circuit, a gain adjustment circuit, a biasing circuit, a main amplification circuit, and an output matching circuit; the input matching circuit is connected between an input end and the gain adjustment circuit; the gain adjustment circuit is connected between the input matching circuit and the input end of the main amplification circuit; the output end of the main amplification circuit is connected to the output matching circuit, a positive power source end thereof is connected to a power supply source, a negative power source end thereof is connected to the biasing circuit; the biasing circuit provides different biasing voltages for the main amplification circuit; and the gain adjustment circuit and the biasing circuit are respectively connected to a gain adjustment control voltage (Vctrl).

Techniques for controlling one or more audio amplifiers in or associated with a device coupled on a local area network are disclosed. An example playback device includes a processor, an amplifier, a network interface, and a memory. The memory includes a software module that, when executed by the processor, causes the playback device to: operate in a first power mode in which the amplifier consumes a first amount of power; while operating in the first power mode, determine that a defined time has passed since receiving, via the network interface, a specified type of data packet; and based on determining that the defined time has passed since receiving the specified type of data packet, transition from operating in the first power mode to operate in a second power mode in which the amplifier consumes a second amount of power, wherein the first amount of power is greater than the second amount of power.

A method and circuit are provided for implementing enhanced CMOS inverter based optical Transimpedance Amplifiers (TIAs). A transimpedence amplifier (TIA) includes a photo-detector, and the TIA is formed by a first TIA inverter and a second TIA inverter. The first TIA inverter has an input from a cathode side of the photo-detector and the second inverter has an input from an anode side of the photo-detector. A replica TIA is formed by two replica inverters, coupled to a respective input to a first operational amplifier and a second operational amplifier. The first operational amplifier and the second operational amplifier have a feedback configuration for respectively regulating a set voltage level at the cathode side of the photo-detector input of the first inverter and at the anode side of the photo-detector input of the second inverter.

Provided is a power amplification module that includes: a first transistor, a first signal being inputted to a base thereof; a second transistor, the first signal being inputted to a base thereof and a collector thereof being connected to a collector of the first transistor; a first resistor, a first bias current being supplied to one end thereof and another end thereof being connected to the base of the first transistor; a second resistor, one end thereof being connected to the one end of the first resistor and another end thereof being connected to the base of the second transistor; and a third resistor, a second bias current being supplied to one end thereof and another end thereof being connected to the base of the second transistor.