Each input channel adjusts a level of an audio signal by individual first parameters and outputs the level-adjusted audio signals to individual output routes that include bus channels. Each bus channel mixes the level-adjusted audio signals and processes the mixed audio signal by a second parameter to output to a main output. A preview channel adjusts a level of the audio signal of each of input channels by a third parameter, mixes the level-adjusted audio signals of the input channels and processes the mixed audio signal by a fourth parameter to output to a monitor output. In response to a preview instruction, the first parameter of the input channel is copied as the third parameter, and the second parameter of the bus channel is copied as the fourth parameter of the preview channel. In response to an adjustment instruction, the third or fourth parameter of the preview channel is changed.

A system including a low noise amplifier is provided. The system further includes a coarse attenuation circuit coupled to an input of the low noise amplifier and configurable to attenuate an input signal by a coarse attenuation interval. The system also includes a fine attenuation circuit coupled in feedback with the low noise amplifier and configurable to attenuate the input signal by a fine attenuation interval, wherein the fine attenuation interval is less than the coarse attenuation interval.

A power amplifier module includes a first bipolar transistor configured to amplify a radio frequency signal and output an amplified signal and a second bipolar transistor. A base of the second bipolar transistor is supplied with a control voltage for controlling attenuation of the radio frequency signal, and a collector the second bipolar transistor is supplied with a source voltage. The power amplifier module also includes a first resistor, where one end of the first resistor is connected to a supply path of the radio frequency signal to the first bipolar transistor, and a capacitor, where one end of the capacitor is connected to the other end of the first resistor and the other end of the capacitor is connected to the collector of the second bipolar transistor.

A power amplifier gain attenuation circuit includes: a gain attenuation (reduction) circuit configured to receive an input signal, an external drive signal and a bias voltage, and output a secondary input signal after attenuating the input signal depending on the drive signal and bias voltage; an amplifier including: a bias input terminal configured to receive a bias voltage; a signal input terminal configured to receive a secondary input signal, and an output terminal configured to output a gained output signal. The power amplifier gain attenuation circuit can reduce a gain effectively, and the amount of phase jump caused by the attenuation is quite small.

A multi-mode multi-band power amplifier includes a controller, a wide-band amplifier channel and a fundamental impedance transformer. The controller receives an external signal and outputs a control signal according to the external signal. The wide-band amplifier channel receives single-band or multi-band RF signals through the input terminal, performs power amplification on the RF signals and outputs the RF signals through the output terminal. The fundamental impedance transformer includes a first segment shared by RF signals in all bands, second segments respectively special for RF signals in all bands, and a switching circuit controlled by the controller to separate RF signals subject to power amplification to the second segment in a switchable manner for multiplexed outputs.

A variable gain amplifier circuit includes first and second input terminals, first and second output terminals, first and second transistors respectively having bases electrically connected to the first and second input terminals and having collectors electrically connected to the first and second output terminals, and a degeneration circuit connected between emitters of the first and second transistors. The degeneration circuit has first and second MOS transistors each having two current terminals connected in series between the emitters of the first and second transistors, series resistor circuits, first and second current sources, two resistive elements connected between the first and second current sources and gates of the first and second MOS transistors, and two resistive elements connected between the first and second current sources and two nodes of the series resistor circuits.

A variable-gain power amplifying technique includes generating, with a network of one or more reactive components included in an oscillator, a first oscillating signal, and outputting, via one or more taps included in the network of the reactive components, a second oscillating signal. The second oscillating signal has a magnitude that is proportional to and less than the first oscillating signal. The power amplifying technique further includes selecting one of the first and second oscillating signals to use for generating a power-amplified output signal, and amplifying the selected one of the first and second oscillating signals to generate the power-amplified output signal.

This application provides example variable gain amplifiers and example phased array transceivers. One example variable gain amplifier includes an amplification circuit, configured to amplify an input signal; a control circuit, configured to control a gain of the amplification circuit by adjusting an output current of the amplification circuit; an inductive load, where the inductive load is coupled to a signal output end of the amplification circuit; and an inductive adjustment circuit, where the inductive adjustment circuit and the inductive load are inductively coupled, and where the inductive adjustment circuit is adjustable.

A power amplification module includes a first input terminal that receives a first transmit signal in a first frequency band, a second input terminal that receives a second transmit signal in a second frequency band having a narrower transmit/receive frequency interval than the first frequency band, a first amplification circuit that receives and amplifies the first transmit signal to produce a first amplified signal and outputs the first amplified signal, a second amplification circuit that receives and amplifies the second transmit signal to produce a second amplified signal and outputs the second amplified signal, a third amplification circuit that receives and amplifies the first or second amplified signal to produce an output signal and outputs the output signal, and an attenuation circuit located between the second input terminal and the second amplification circuit and configured to attenuate a receive frequency band component of the second frequency band.

The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input. A second transistor receives a second input. A plurality of impedance networks is coupled between the first transistor and the second transistor. At least one impedance network of the plurality of impedance networks includes a first impedance path and a second impedance path. The first impedance path is activated during single ended operation, and the second impedance path is activated during differential operation.