Patent classifications
H03G1/00
Operation amplifiers with offset cancellation
A semiconductor device includes an operational transconductance amplifier (OTA) with a matched pair of transistors including a first transistor and a second transistor, and configuration units that include a first set of switches, a second set of switches, and an input transistor. Gain adjustment circuitry is coupled to adjust gain of the OTA. Measurement circuitry is coupled to measure offset in the OTA. Control logic is configured to operate the first and second sets of switches to couple input transistors of a first group of the configuration units to the first transistor of the matched pair of transistors, and to couple input transistors of a remaining group of the configuration units to the second transistor of the matched pair of transistors. Settings of the first and second sets of switches are selected to minimize the offset.
Driver circuit arrangement for driving load and differential drive arrangement thereof
A driver circuit arrangement for driving a load and a differential drive arrangement thereof are provided. The driver circuit arrangement employs a dual feedback configuration with a feedback resistor and a current sensor feedback arrangement. The current sensor feedback arrangement provides a current feedback path from the amplifier output to the amplifier input, and has a current sensor resistor connected in an output current path of the driver circuit arrangement. A current feedback amplifier is present connected to the current sensor resistor and to the amplifier input.
Amplifier circuit
An amplifier circuit includes a first dynamic amplifier and a second dynamic amplifier. The first dynamic amplifier amplifies an input voltage to generate an intermediate voltage. The second dynamic amplifier amplifies the intermediate voltage to generate an output voltage. The first dynamic amplifier has a first gain, the second dynamic amplifier has a second gain, and the gain of the amplifier circuit is the product of the first gain and the second gain.
High Linearly WiGig Baseband Amplifier with Channel Select Filter
A circuit comprises a Sallen-Key filter, which includes a source follower that implements a unity-gain amplifier; and a programmable-gain amplifier coupled to the Sallen-Key filter. The circuit enables programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier, which decouples the bandwidth of the circuit from its gain settings. The programmable-gain amplifier can comprise a differential voltage-to-current converter, a current mirror pair, and programmable output gain stages. The Sallen-Key filter and at least one branch in the programmable-gain amplifier can comprise transistors arranged in identical circuit configurations.
AMPLIFIER CALIBRATION
An amplifier circuit can include an amplifier and a resistor network coupled to the amplifier. The resistor network can include a range resistor coupled in parallel to a resistor string, and one or more switches coupled to the resistor string. The resistor network can be used to calibrate gain and common mode rejection ratio (CMRR) of the amplifier circuit.
Circuit and Method for a High Common Mode Rejection Amplifier by Using a Digitally Controlled Gain Trim Circuit
An amplifier comprising a differential amplifier configured to be provide a comparator function, and a gain trimming circuit is electrically configured to provide gain trimming using a T-network comprising a varistor element. In addition, a method of trimming the gain of a differential amplifier, comprising the steps of a first step, (a) providing the differential amplifier comprising resistors in both of its paths, a second step, (b) providing a varistor in a T-network between both said paths; and lastly, a third step, (c) trimming the gain of the differential amplifier by adjusting the varistor's resistance.
Method and apparatus for current steering in high sensitivity, high linearity and large dynamic range high speed trans-impedance amplifiers
The present invention relates to a linear, high sensitivity, high speed trans-impedance amplifier (TIA) which allows a large dynamic range of input current up to very large values, maintains high linearity and keeps constant output voltage, maintains the same frequency response across the full gain control range, provides very high input sensitivity and large bandwidth, and allows input current monitoring without affecting input sensitivity. In other words, the novel circuit disclosed herein provides for the feedback path to maintain the same level of feedback even while the output signal is varied. This allows a wide and stable bandwidth, as well as a monitor to be placed in the TIA.
Transimpedance Amplifier For High-Speed Optical Communications Based On Linear Modulation
This invention relates to a optical receiver circuit (200) comprising: at least one photo detector (207) configured to convert a received light signal to an input current signal, a transimpedance amplifier circuit (201) with an input to receive the input current signal from the at least one photo detector (207) and being configured to convert the received input current signal to an output voltage signal to generate an output signal of the transimpedance amplifier circuit (201), wherein the transimpedance amplifier circuit comprises a plurality of gain amplifier stages (209, 210, 211), a DC restoration component (205), wherein the DC restoration component (205) is configured to receive the output voltage signal of the transimpedance amplifier circuit (201) for restoring the DC component of the received current signal and configured for outputting a corresponding current signal, and an automatic gain control component (204) configured for controlling via at least one programmable feedback resistor (226, 227) the equivalent transimpedance of the transimpedance amplifier circuit based on the signal output by the DC restoration component (205) to provide a constant output voltage amplitude for different current ranges of the input current signal.
RIPPLE REDUCTION METHOD FOR CHOPPER AMPLIFIERS
An electrical circuit comprising a modulating chopper configured to receive a differential input signal at a first frequency and modulate the differential input signal to a second frequency to form a modulated differential signal, a null amplifier coupled to the modulating chopper and configured to amplify the modulated differential signal to form an amplifier output, wherein amplifying the modulated differential signal causes a ripple in the amplifier output, a demodulating chopper coupled to the null amplifier and configured to demodulate the amplifier output to form a demodulated differential signal having a first portion at the first frequency and a second portion at a third frequency, an integrator coupled to the demodulating chopper and configured to integrate the demodulated differential signal to form an integrated differential signal, and an attenuator coupled to the integrator and configured to attenuate the integrated differential signal to compensate for at least part of the ripple.
OPERATION AMPLIFIERS WITH OFFSET CANCELLATION
A semiconductor device includes an operational transconductance amplifier (OTA) with a matched pair of transistors including a first transistor and a second transistor, and configuration units that include a first set of switches, a second set of switches, and an input transistor. Gain adjustment circuitry is coupled to adjust gain of the OTA. Measurement circuitry is coupled to measure offset in the OTA. Control logic is configured to operate the first and second sets of switches to couple input transistors of a first group of the configuration units to the first transistor of the matched pair of transistors, and to couple input transistors of a remaining group of the configuration units to the second transistor of the matched pair of transistors. Settings of the first and second sets of switches are selected to minimize the offset.