A circuit includes an operational amplifier and a resistor network coupled to an output of the operational amplifier. The resistor network includes a first set of resistors coupled between the output of the operational amplifier and a first node of the resistor network, wherein the resistors of the first set are electrically connected in series with each other, a second set of resistors coupled between the first node and a second node of the resistor network, wherein the resistors of the second set are electrically connected in series with each other and include a first number of resistors, a third set of resistors coupled between the second node and a third node of the resistor network, wherein the third node is coupled to a first voltage, and wherein the resistors of the third set are electrically connected in parallel with each other and include a second number of resistors, and a resistor coupled between the first node and the second node and arranged in parallel with the second set of resistors.

Systems and methods for a variable-gain differentiator in series with at least two non-inverting amplifiers. The variable-gain differentiator is connected to a voltage-controlled source at its non-inverting input and to its output at its inverting input. The output is connected to the non-inverting input of the first non-inverting amplifier. The output of the first non-inverting amplifier is connected to the input of the second non-inverting amplifier. The output of the second non-inverting amplifier is connected to a series of three integrators. Each integrator is connected to its output by a feedback path.

The present disclosure relates to circuitry for providing an output voltage. The circuitry comprises: voltage generator circuitry configured to provide an output voltage to an output node of the circuitry; current limiter circuitry operable to perform current limiting so as to limit a current supplied at the output node of the circuitry; detection circuitry configured to output a detection signal when a load voltage across a load coupled to the output node of the circuitry reaches a target voltage; and delay circuitry configured to receive the detection signal and to output a control signal to deactivate current limiting by the current limiter circuitry after a predetermined delay period after receiving the detection signal.

A circuit includes a differential input stage amplifier that receives a differential input voltage and generates an output voltage based on a difference in the differential input voltage. A feedback loop provides feedback from an output of the differential input stage amplifier to input tail current of the differential input stage amplifier. The feedback loop enables class AB operation of the differential input stage amplifier. At least one gain reducer is operatively coupled to the feedback loop to reduce the gain of the feedback loop. The gain reducer has a resistance value that varies inversely proportional to loop current in the feedback loop to reduce the gain of the feedback loop as loop current increases.

A method for operating a phase shifter chip RF self-test. The method includes outputting, by control hardware, a first signal from a phased locked loop to a pre-amplifier and an input peak detector, outputting, by the control hardware, a second signal from the pre-amplifier to a device under test, selecting, by the control hardware, a target level, and adjusting, by the control hardware, a pre-amplifier gain of the pre-amplifier to cause the input peak detector value to approximately match the target level. The input peak detector is configured to output an input peak detector value based on the first signal.

A method and electronic circuit for changing the gain of a radio frequency signal. The apparatus is an electronic circuit comprising one or more variable gain electronic elements, and one or more adjustable phase shifting elements. The method comprises the steps of receiving a radio frequency signal, varying the gain of the variable gain electronic element while the variable gain electronic element changes the amplitude of the radio frequency signal, and adjusting an adjustable phase shifting element to generate a reverse phase shift in the radio frequency signal in response to the associated phase shift from the step of varying the gain.

The present disclosure describes a method and system for linearizing an amplifier using transistor-level dynamic feedback. The method and system enables nonlinear amplifiers to exhibit linear performance using one or more of gain control elements and phase shifters in the feedback path. The disclosed method and system may also allow an amplifier to act as a pre-distorter or a frequency/gain programmable amplifier.

Disclosed is a power amplification module which has a comparatively small size and is capable of adjusting the rising characteristic of a gain. The power amplification module includes a first gain control current generation circuit which generates a first gain control current changing with a control voltage, a first bias current generation circuit which generates a first bias current according to the first gain control current, a gain control voltage generation circuit which generates a gain control voltage changing with the control voltage, a first transistor which is emitter-grounded and in which an input signal and the first bias current are supplied to a base thereof, and a second transistor which is cascode-connected to the first transistor and in which the gain control voltage is supplied to a base thereof and a first output signal obtained by amplifying the input signal is output from a collector thereof.

Provided is a reconfigurable amplifier. The reconfigurable amplifier includes a gain circuit including a gain path configured to amplify an input signal, and a feed forward circuit including a feed forward path configured to receive the input signal and perform feed forward compensation on the input signal, and a first control circuit configured to perform the feed forward compensation in a first mode by activating the feed forward path, and deactivate the feed forward path in a second mode different from the first mode.

A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.