A gain stage circuit can include first and second follower circuits arranged as a differential pair and configured to receive respective input signals. The gain stage circuit can include or use a pass stage circuit including an adjustable-impedance signal path that couples the first and second follower circuits. The gain stage circuit can further include or use a control circuit to receive the input signals and, in response, provide a control signal to the pass stage circuit to control an impedance of the signal path that couples the first and second follower circuits.

A circuit includes an auxiliary circuit and a current generator circuit. The auxiliary circuit is implemented using a metal layer in a chip and operated using a bias current. The current generator circuit includes a metal resistor implemented as a trace using the metal layer. The current generator circuit generates the bias current based on the metal resistor and adjusts a value of the metal resistor in response to a change in a metal wiring resistance associated with the metal layer.

An amplifier circuit includes a first transistor having a terminal and a second transistor having a terminal coupled to the terminal of the first transistor. A third transistor has a first terminal coupled to the terminals of the first and second transistors and has a control terminal. A fourth transistor has a control terminal coupled to the terminals of the first and second transistors and to the first terminal of the third transistor. The fourth transistor has a second terminal. A fifth transistor has a control terminal coupled to the second terminal of the fourth transistor and has second and third terminals. A sixth transistor has a control terminal coupled to the control terminal of the third transistor and to the third terminal of the fifth transistor. The sixth transistor has a second terminal coupled to the second terminal of the fifth transistor.

The present disclosure provides for a togglable audio ducking device preferably with a mechanically triggered pressure-sensitive floor pad that detects pressure when a user's body weight is in the proximity of the microphone. The mechanically triggered pressure-sensitive floor pad may allow the user to effectively reduce ambient noise bleed into microphones without muting the microphone (i.e. audio ducking). In other embodiments, the togglable audio ducking device may be operated using a magnetic switch attached to a microphone stand, which is triggered when the microphone stand rotates in a particular direction to a certain degree.

A programmable gain amplifier (PGA) architecture provides for robust operation over a bandwidth and for a multitude of gain settings. For instance, the PGA architecture may include multiple switches to implement different current paths by bypassing resistors in a resistor ladder. The different current paths may result in different gain settings. In some implementations, the switches may be used to hold a value of RA constant while a value of RB may be varied over the different gain settings, where gain may be inferred from the equation Vout=Vin*(1+RB/RA).

Disclosed herein are signal amplifier architectures that provide a plurality of gain modes. Different gain modes can use different paths through the amplifier architecture. Switches that are used to select the path through the amplifier architecture can be configured to also provide targeted impedance in a degeneration block or matrix. The switches that select the gain path are provided in the amplifier architecture and are thus not needed or used in the degeneration block, thereby reducing the size of the package for the amplifier architecture, improving the noise figure (NF), improving impedance matching, and eliminating the need for control logic associated with the degeneration block or matrix.

Provided in the present disclosure is a variable gain amplifier, including: a voltage signal input end; a high level generation module including two high level signal output ends, and configured to convert a voltage signal input from the voltage signal input end into a first high level signal and a second high level signal; a switch signal conversion module including a high level signal input end, N digital signal input ends and N switch signal output ends, and configured to output, through corresponding switch signal output ends and under the control of signals input from the digital signal input ends, gain control signals associated with a signal output from the first high level signal output end; and an amplification module including an amplification unit and N stages of gain control units, where N is a positive integer not less than 1. Further provided is a transmitting apparatus.

A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.

A squelch detector is disclosed by the present application. By configuring the first to third bias current sources and a mirror ratio of the current mirror circuit, when an amplitude difference between first and second input signals is smaller or greater than a squelch threshold, flip of an output node in the squelch detector depends only on the squelch threshold and is independent of variations of process, voltage and temperature (PVT) parameters. Thus, the squelch detector can always provide reliable amplitude detection of input signals despite of possible variations of the PVT parameters.

An attenuator circuit includes an input/output circuit that is provided at a stage preceding an power amplifier circuit, and a first control circuit that controls a gain of the input/output circuit. The input/output circuit includes at least a first resistor that is electrically connected between an input terminal and an output terminal, and a first FET that is electrically connected between the output terminal and a reference potential point. The first control circuit includes at least a second FET that has an ON resistance that is substantially equal to an ON resistance of the first FET at a time when a gate bias voltage that is the same as a gate bias voltage of the first FET is applied. A gate of the first FET and a gate of the second FET are electrically connected.