Dynamic automatic gain controller configuration in multiple input and multiple output receivers is provided by monitoring a given section of wireless spectrum for higher-priority signals using a first antenna set associated with a first Automatic Gain Controller (AGC) set while concurrently monitoring the given section of wireless spectrum for wireless packet-based traffic using a second antenna set associated with a second AGC set; in response to detecting a packet via the second antenna set: re-associating the first antenna set and the second antenna set to a third AGC set; receiving the packet via the first antenna set and the second antenna set using the third AGC set; and in response to the packet being received, re-associating the first antenna set to the first AGC set and the second antenna set to the second AGC set.

Embodiments are provided for satellite volume control. An example method includes receiving an input at a playback device to adjust a volume for a plurality of playback devices that are grouped for synchronous playback of audio content, wherein the plurality of playback devices includes the playback device. The method also includes sending a first message over a network from the playback device to a device associated with the plurality of playback devices, the first message including information based on the input, wherein the information is used to adjust the volume of the plurality of playback devices. The method also includes receiving a second message at the playback device over the network, the second message including information for the volume of the playback device, wherein the volume is based on the adjusted volume of the plurality of playback devices.

A system for controlling the gain of an input signal in an audio signal amplifier. The system includes a user-operable gain control, and analog and digital circuit elements that together are configured to modify the gain of the input signal in response to the user-operable gain control.

This application relates to ADC circuitry. An ADC circuit (200) has first and second conversion paths (201a, 201b) for converting analogue signals to digital and is operable in first and second modes. In the first mode, the first and second conversion paths are connected to respective first and second input nodes (202a, 202b) to receive and convert full scale first and second analogue input signals (Ain1, Ain2) to separate digital outputs (Dout1, Dout2). In the second mode, the first and second conversion paths are both connected to the first input node (202a), to convert the first analogue input signal (Ain1) to respective first and second digital signals, and the first and second conversion paths are configured for processing different signal levels of the first analogue input signal. A selector (207) select the first digital signal or the second digital to be output as an output signal based on an indication of amplitude of the first analogue input signal.

A circuit includes an operational amplifier and a resistor network coupled to an output of the operational amplifier. The resistor network includes a first set of resistors coupled between the output of the operational amplifier and a first node of the resistor network, wherein the resistors of the first set are electrically connected in series with each other, a second set of resistors coupled between the first node and a second node of the resistor network, wherein the resistors of the second set are electrically connected in series with each other and include a first number of resistors, a third set of resistors coupled between the second node and a third node of the resistor network, wherein the third node is coupled to a first voltage, and wherein the resistors of the third set are electrically connected in parallel with each other and include a second number of resistors, and a resistor coupled between the first node and the second node and arranged in parallel with the second set of resistors.

Multiple example valve amplifiers are provided. A first example valve amplifier is provided which comprises (i) a valve power amplifier switchable between a high-power mode and a low-power mode and (ii) a loudspeaker simulator circuit, the valve amplifier being configured such that the valve power amplifier drives the loudspeaker simulator circuit in the low-power mode. A second example valve amplifier is provided which comprises a switched-mode power supply, SMPS, system), the SMPS system comprising (i) an SMPS and (ii) circuitry configured to enable an output impedance of the SMPS to be switched between first and second output impedances, the first output impedance being lower than the second output impedance.

Apparatus and methods for envelope tracking systems with automatic mode selection are provided herein. In certain configurations, a power amplifier system includes a power amplifier configured to provide amplification to a radio frequency signal and to receive power from a power amplifier supply voltage, and an envelope tracker including a signal bandwidth detection circuit configured to generate a detected bandwidth signal based on processing an envelope signal corresponding to an envelope of the radio frequency signal. The envelope tracker further includes a switch bank configured to receive a plurality of regulated voltages, a filter configured to filter an output of the switch bank to generate the power amplifier supply voltage, and a mode control circuit configured to control a filtering characteristic of the filter based on the detected bandwidth signal.

A signal gain determination circuit including a digital comparator, a digital controller and an arithmetic module, and a signal gain determination method are provided. A sensing integration circuit generates a first count during a first integration time according to a first sensing signal. The digital comparator compares the first count and a predetermined count to generate a comparison result. The digital controller generates a control signal for indicating a signal gain to a signal amplifier of the sensing integration circuit according to the comparison result. The signal amplifier adjusts the first sensing signal according to the signal gain to generate a second sensing signal, so that the sensing integration circuit generates a second count corresponding to the second sensing signal during a second integration time. The arithmetic module generates an output count corresponding to the first sensing signal according to the second count and the signal gain.

A half duplex amplifier for a cable network.

A data processing unit creates a database for electric field levels of predetermined frequency bands received by a second tuner. An interfering station determination unit determines whether or not there are a first interfering station and a second interfering station to generate intermodulation interference of third-order distortion with respect to a specific receiving station. A gain calculation unit calculates, as a gain attenuation amount, a difference between at least one of an electric field level of the first interfering station and an electric field level of the second interfering station that are included in the database created by the data processing unit and a reference electric field level at which no intermodulation interference of third-order distortion occurs, the reference electric field level set on the basis of output saturation characteristics of a first high-frequency amplifier inside a first tuner, in a case where the interfering station determination unit determines that there are the first interfering station and the second interfering station. A gain control unit controls the gain of the first high-frequency amplifier using the gain attenuation amount.