H03G11/00

Input power limited switching regulator

This disclosure describes a system and a method to limit (i.e., regulate) the input power of a power converter as a function of the voltage and/or loading condition of a power-limited source such as a battery. In some embodiments, the power converter may comprise a transconductance amplifier that may produce a sink current to a current mirror, which in turn that may provide an adjusted current limit threshold to the power converter. The power converter may utilize the current limit threshold to perform cycle-by-cycle current limiting, thus regulating the input power drawn from the battery.

Radio frequency power limiter with reflected power detection
10951177 · 2021-03-16 · ·

A radio frequency (RF) power limiter includes an input direct current (DC) block, an output DC block, a limiter diode, a RF choke, and a test diode. A first terminal of the limiter diode is coupled to a node between the input DC block and the output DC block, and a second terminal of the limiter diode is coupled to an electrical ground. A first terminal of the RF choke is coupled to the node between the input DC block and the output DC block so that the first terminal of the RF choke is coupled to the first terminal of the limiter diode. A first terminal of the test diode is coupled to the second terminal of the RF choke, and a second terminal of the test diode is coupled to the electrical ground.

Systems and methods for processing an audio signal for replay on an audio device
11062717 · 2021-07-13 · ·

Systems and methods for processing an audio signal are provided for replay on an audio device. An audio signal is spectrally decomposed into a plurality of subband signals using band pass filters. Each of the subband signals are provided to a respective modulator and subsequently, from the modulator output, provided to a respective first processing path that includes a first dynamic range compressor, DRC. Each subband signal is feedforward compressed by the respective first DRC to obtain a feedforward-compressed subband signal, wherein the first DRC is slowed relative to an instantaneous DRC. Subsequently, each feedforward-compressed subband signal is provided to a second processing path that includes a second DRC, wherein the feedforward-compressed subband signal is compressed by the respective second DRC and outputted to the respective modulator. Modulation of the subband signals is then performed in dependence on the output of the second processing path. Finally, the feedforward-compressed subband signals are recombined.

Micro plasma limiter for RF and microwave circuit protection
10897130 · 2021-01-19 · ·

A protection circuit configured to protect delicate electronics from high power signals is disclosed herein. To that end, the protection circuit includes a limiter circuit comprising a phase changing material to prevent high power signals from reaching one or more electronic circuits. The phase changing material assumes a limiting state automatically when an energy of an applied signal exceeds a threshold, which limits the energy of the signal passed on to any associated electronics.

Systems and methods of volume limiting
10862446 · 2020-12-08 · ·

Systems and methods for limiting volume in an audio playback device using a feedback controller are disclosed herein. In one example, a gain stage modulates gain of an audio signal based in part on feedback from a downstream limiter. The gain stage receives a first audio signal as well as a feedback signal from the feedback controller. Based at least in part on the feedback signal from the feedback controller, the gain stage modulates a gain of the first audio signal to provide a second audio signal. The second audio signal is delivered to the limiter, which limits the second audio signal to produce an output signal. The output signal is played back via a transducer. The feedback controller receives a gain reduction value from the limiter and determines a feedback signal to provide to the gain stage upstream of the limiter.

Systems and methods of volume limiting
10862446 · 2020-12-08 · ·

Systems and methods for limiting volume in an audio playback device using a feedback controller are disclosed herein. In one example, a gain stage modulates gain of an audio signal based in part on feedback from a downstream limiter. The gain stage receives a first audio signal as well as a feedback signal from the feedback controller. Based at least in part on the feedback signal from the feedback controller, the gain stage modulates a gain of the first audio signal to provide a second audio signal. The second audio signal is delivered to the limiter, which limits the second audio signal to produce an output signal. The output signal is played back via a transducer. The feedback controller receives a gain reduction value from the limiter and determines a feedback signal to provide to the gain stage upstream of the limiter.

ENVIRONMENTAL ACOUSTIC DOSIMETRY WITH WATER EVENT DETECTION
20200378824 · 2020-12-03 ·

In-ear sound pressure level, SPL, is determined that is caused by output audio being converted into sound by a headset worn by a user. The in-ear SPL is converted into a sound sample having units that are suitable for evaluating sound noise exposure. These operations are repeated to produce a sequence of sound samples during playback. This sequence of sound samples is then written to a secure database. Access to the database is authorized by the user. Other aspects are also described and claimed.

CMOS RF power limiter and ESD protection circuits

An RF power limiter and ESD protection circuit has a set of two CMOS FETs each configured to perform a diode function with a defined forward voltage and arranged in an anti-parallel configuration and coupled between the input terminal and the ground terminal. When an RF signal is applied symmetrically to the input terminal and ground terminal it becomes symmetrically attenuated when the signal level exceeds the defined forward voltage of the diode configured CMOS FETs. In the ESD protection mode one of the CMOS FETs acts as a grounded gate NMOS transistor with SCR action to provide for mitigation of voltage and current over-stress of transistors utilized in RF transceiver circuits. Generally, the circuit architectures allow input power levels to be limited to an extent that reliable operation can be maintained.

Integrated RF Front End with Stacked Transistor Switch
20200373962 · 2020-11-26 ·

A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Stacks of multiple FETs in series to operate as a switching device may be used for implementation of the RF front end, and the method and apparatus of such stacks are claimed as subcombinations. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits.

Integrated RF Front End with Stacked Transistor Switch
20200373962 · 2020-11-26 ·

A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Stacks of multiple FETs in series to operate as a switching device may be used for implementation of the RF front end, and the method and apparatus of such stacks are claimed as subcombinations. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits.